diff options
| -rw-r--r-- | gen-icount.h | 9 | ||||
| -rw-r--r-- | target-arm/translate.c | 26 |
2 files changed, 0 insertions, 35 deletions
diff --git a/gen-icount.h b/gen-icount.h index 01face23b..3268f720a 100644 --- a/gen-icount.h +++ b/gen-icount.h @@ -11,14 +11,7 @@ static inline void gen_icount_start(void) return; icount_label = gen_new_label(); - /* FIXME: This generates lousy code. We can't use tcg_new_temp because - count needs to live over the conditional branch. To workaround this - we allow the target to supply a convenient register temporary. */ -#ifndef ICOUNT_TEMP count = tcg_temp_local_new_i32(); -#else - count = ICOUNT_TEMP; -#endif tcg_gen_ld_i32(count, cpu_env, offsetof(CPUState, icount_decr.u32)); /* This is a horrid hack to allow fixing up the value later. */ icount_arg = gen_opparam_ptr + 1; @@ -26,9 +19,7 @@ static inline void gen_icount_start(void) tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label); tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low)); -#ifndef ICOUNT_TEMP tcg_temp_free_i32(count); -#endif } static void gen_icount_end(TranslationBlock *tb, int num_insns) diff --git a/target-arm/translate.c b/target-arm/translate.c index e32b284d2..368278bcc 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -78,11 +78,9 @@ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; /* FIXME: These should be removed. */ -static TCGv cpu_T[2]; static TCGv cpu_F0s, cpu_F1s; static TCGv_i64 cpu_F0d, cpu_F1d; -#define ICOUNT_TEMP cpu_T[0] #include "gen-icount.h" static const char *regnames[] = @@ -96,9 +94,6 @@ void arm_translate_init(void) cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); - cpu_T[0] = tcg_global_reg_new_i32(TCG_AREG1, "T0"); - cpu_T[1] = tcg_global_reg_new_i32(TCG_AREG2, "T1"); - for (i = 0; i < 16; i++) { cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, regs[i]), @@ -822,27 +817,6 @@ static inline void gen_set_pc_im(uint32_t val) tcg_gen_movi_i32(cpu_R[15], val); } -static inline void gen_movl_reg_TN(DisasContext *s, int reg, int t) -{ - TCGv tmp; - if (reg == 15) { - tmp = new_tmp(); - tcg_gen_andi_i32(tmp, cpu_T[t], ~1); - } else { - tmp = cpu_T[t]; - } - tcg_gen_mov_i32(cpu_R[reg], tmp); - if (reg == 15) { - dead_tmp(tmp); - s->is_jmp = DISAS_JUMP; - } -} - -static inline void gen_movl_reg_T1(DisasContext *s, int reg) -{ - gen_movl_reg_TN(s, reg, 1); -} - /* Force a TB lookup after an instruction that changes the CPU state. */ static inline void gen_lookup_tb(DisasContext *s) { |