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authorBlue Swirl <blauwirbel@gmail.com>2011-09-11 15:05:41 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-10-26 17:18:58 +0000
commit11e66bca8ab0985e988e7c2fd019b743d79b4732 (patch)
treea7ab48fcba8f7f02ad81708c3452ef6fa7dcbe9e /trace-events
parentec0ceb1759317a8c0e4b4fd63087aca8ecb6cf96 (diff)
Sparc: convert interrupt helpers to trace framework
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'trace-events')
-rw-r--r--trace-events7
1 files changed, 7 insertions, 0 deletions
diff --git a/trace-events b/trace-events
index 7b5aa91a5..0cc1f66b9 100644
--- a/trace-events
+++ b/trace-events
@@ -609,3 +609,10 @@ mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context
mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64""
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64""
+
+# target-sparc/int_helper.c
+int_helper_set_softint(uint32_t softint) "new %08x"
+int_helper_clear_softint(uint32_t softint) "new %08x"
+int_helper_write_softint(uint32_t softint) "new %08x"
+int_helper_icache_freeze(void) "Instruction cache: freeze"
+int_helper_dcache_freeze(void) "Data cache: freeze"