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authorFabien Chouteau <chouteau@adacore.com>2012-01-26 18:03:15 +0100
committerBlue Swirl <blauwirbel@gmail.com>2012-01-30 19:13:21 +0000
commit0c685d2827ad591484b3ef667834a81967b5fad7 (patch)
treeeded955230374931dd19f0b0452542a8fd0976bf /trace-events
parentfd39941ac78fbe969e292eeb91415ec548bd97a6 (diff)
GRLIB UART: Add RX channel
This patch implements the RX channel of GRLIB UART with a FIFO to improve data rate. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'trace-events')
-rw-r--r--trace-events1
1 files changed, 1 insertions, 0 deletions
diff --git a/trace-events b/trace-events
index 75f6e17ab..5d0574964 100644
--- a/trace-events
+++ b/trace-events
@@ -351,6 +351,7 @@ grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" valu
# hw/grlib_apbuart.c
grlib_apbuart_event(int event) "event:%d"
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
+grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
# hw/leon3.c
leon3_set_irq(int intno) "Set CPU IRQ %d"