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authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2011-08-29 23:07:36 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2011-09-06 11:09:38 +0200
commite428097341041ea7a12069a848ef3c92dff13b39 (patch)
tree8c9ee21b9ea571f78ec0c8a11f113324f1dd6449 /target-mips
parentbc45a67a22f18146e638a6e550f282f688abdd7f (diff)
mips: Correct VInt vector generation
1. The pending need to pass the Status IM gating. 2. The priority is from seven (highest prio) down to zero. QEMU was doing the opposite. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/helper.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 024caa23c..1c58e0cc2 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -482,18 +482,18 @@ void do_interrupt (CPUState *env)
unsigned int vector;
unsigned int pending = (env->CP0_Cause & CP0Ca_IP_mask) >> 8;
+ pending &= env->CP0_Status >> 8;
/* Compute the Vector Spacing. */
spacing = (env->CP0_IntCtl >> CP0IntCtl_VS) & ((1 << 6) - 1);
spacing <<= 5;
if (env->CP0_Config3 & (1 << CP0C3_VInt)) {
/* For VInt mode, the MIPS computes the vector internally. */
- for (vector = 0; vector < 8; vector++) {
- if (pending & 1) {
+ for (vector = 7; vector > 0; vector--) {
+ if (pending & (1 << vector)) {
/* Found it. */
break;
}
- pending >>= 1;
}
} else {
/* For VEIC mode, the external interrupt controller feeds the