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authorAurelien Jarno <aurelien@aurel32.net>2010-12-25 22:56:32 +0100
committerAurelien Jarno <aurelien@aurel32.net>2010-12-27 00:58:06 +0100
commit4cdc1cd137e0b98766916a7cdf2d5a9b3c6632fa (patch)
tree4634bbca8423124883394dcf88957a3ed52ce0b0 /target-mips
parent6c33286ad3a432627d763ee93aa42200cbb68269 (diff)
target-mips: fix host CPU consumption when guest is idle
When the CPU is in wait state, do not wake-up if an interrupt can't be taken. This avoid host CPU running at 100% if a device (e.g. timer) has an interrupt line left enabled. Also factorize code to check if interrupts are enabled in cpu_mips_hw_interrupts_pending(). Based on a patch from Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.h8
-rw-r--r--target-mips/exec.h18
2 files changed, 23 insertions, 3 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index c1f211fc1..2419aa93d 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -532,6 +532,14 @@ static inline int cpu_mips_hw_interrupts_pending(CPUState *env)
int32_t status;
int r;
+ if (!(env->CP0_Status & (1 << CP0St_IE)) ||
+ (env->CP0_Status & (1 << CP0St_EXL)) ||
+ (env->CP0_Status & (1 << CP0St_ERL)) ||
+ (env->hflags & MIPS_HFLAG_DM)) {
+ /* Interrupts are disabled */
+ return 0;
+ }
+
pending = env->CP0_Cause & CP0Ca_IP_mask;
status = env->CP0_Status & CP0Ca_IP_mask;
diff --git a/target-mips/exec.h b/target-mips/exec.h
index af61b54dc..12736543a 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -19,10 +19,22 @@ register struct CPUMIPSState *env asm(AREG0);
static inline int cpu_has_work(CPUState *env)
{
- return (env->interrupt_request &
- (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER));
-}
+ int has_work = 0;
+
+ /* It is implementation dependent if non-enabled interrupts
+ wake-up the CPU, however most of the implementations only
+ check for interrupts that can be taken. */
+ if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ cpu_mips_hw_interrupts_pending(env)) {
+ has_work = 1;
+ }
+ if (env->interrupt_request & CPU_INTERRUPT_TIMER) {
+ has_work = 1;
+ }
+
+ return has_work;
+}
static inline int cpu_halted(CPUState *env)
{