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authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-05-27 01:19:58 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-05-27 01:19:58 +0200
commitd0f3654f8346ac32953b3ca4bb3dce5e63517ab7 (patch)
tree4b80e266c67c9a85577bd5a616b7e8c51cde6b34 /target-microblaze
parent6b2fce907dda9f0355e968bfe6f868ae65f882e7 (diff)
microblaze: Make writes to MMU_ZPR flush the TLB.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r--target-microblaze/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target-microblaze/mmu.c b/target-microblaze/mmu.c
index 72d318384..d14373ce4 100644
--- a/target-microblaze/mmu.c
+++ b/target-microblaze/mmu.c
@@ -220,6 +220,13 @@ void mmu_write(CPUState *env, uint32_t rn, uint32_t v)
D(qemu_log("%s ram[%d][%d]=%x\n", __func__, rn & 1, i, v));
break;
case MMU_R_ZPR:
+ /* Changes to the zone protection reg flush the QEMU TLB.
+ Fortunately, these are very uncommon. */
+ if (v != env->mmu.regs[rn]) {
+ tlb_flush(env, 1);
+ }
+ env->mmu.regs[rn] = v;
+ break;
case MMU_R_PID:
if (v != env->mmu.regs[rn]) {
mmu_change_pid(env, v);