diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-23 20:46:56 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-23 20:46:56 +0000 |
| commit | 9230e66e5c711bd077705465d34161d6b1e7fee7 (patch) | |
| tree | a378dce30060a2b654a945c56ecd019d23881a8b /target-i386 | |
| parent | 0523c6b7c5605e93b1c9960a3a91d08535e9a77e (diff) | |
CR8 support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1237 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/cpu.h | 13 | ||||
| -rw-r--r-- | target-i386/translate.c | 7 |
2 files changed, 9 insertions, 11 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 25af117a5..781be2838 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -509,15 +509,6 @@ typedef struct CPUX86State { void *opaque; } CPUX86State; -#ifndef IN_OP_I386 -void cpu_x86_outb(CPUX86State *env, int addr, int val); -void cpu_x86_outw(CPUX86State *env, int addr, int val); -void cpu_x86_outl(CPUX86State *env, int addr, int val); -int cpu_x86_inb(CPUX86State *env, int addr); -int cpu_x86_inw(CPUX86State *env, int addr); -int cpu_x86_inl(CPUX86State *env, int addr); -#endif - CPUX86State *cpu_x86_init(void); int cpu_x86_exec(CPUX86State *s); void cpu_x86_close(CPUX86State *s); @@ -615,6 +606,10 @@ uint64_t cpu_get_tsc(CPUX86State *env); void cpu_set_apic_base(CPUX86State *env, uint64_t val); uint64_t cpu_get_apic_base(CPUX86State *env); +void cpu_set_apic_tpr(CPUX86State *env, uint8_t val); +#ifndef NO_CPU_IO_DEFS +uint8_t cpu_get_apic_tpr(CPUX86State *env); +#endif /* will be suppressed */ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0); diff --git a/target-i386/translate.c b/target-i386/translate.c index 17ce6fa60..f8449e420 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -5631,17 +5631,20 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 2: case 3: case 4: + case 8: if (b & 2) { gen_op_mov_TN_reg[ot][0][rm](); gen_op_movl_crN_T0(reg); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } else { - gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg])); + if (reg == 8) + gen_op_movtl_T0_cr8(); + else + gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg])); gen_op_mov_reg_T0[ot][rm](); } break; - /* XXX: add CR8 for x86_64 */ default: goto illegal_op; } |