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authorIsaku Yamahata <yamahata@valinux.co.jp>2009-12-15 20:26:02 +0900
committerMichael S. Tsirkin <mst@redhat.com>2009-12-23 16:35:00 +0200
commite0fe0204416b9ea2936ffba69bdd26b2a5c9da02 (patch)
tree5a96288a3a6b74a1c278590fccaa06f9727b29ed /hw
parentfb58a897fdcaeedc09f0064817809f1e4d490324 (diff)
gt64xxx: remove gt64120_{read, write}_config().
They call only pci_default_{read, write}_config(). So they aren't necessary. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/gt64xxx.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index fb7f5bd82..c8034e2ae 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -1082,17 +1082,6 @@ static void gt64120_reset(void *opaque)
gt64120_pci_mapping(s);
}
-static uint32_t gt64120_read_config(PCIDevice *d, uint32_t address, int len)
-{
- return pci_default_read_config(d, address, len);
-}
-
-static void gt64120_write_config(PCIDevice *d, uint32_t address, uint32_t val,
- int len)
-{
- pci_default_write_config(d, address, val, len);
-}
-
static void gt64120_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
@@ -1125,7 +1114,7 @@ PCIBus *pci_gt64120_init(qemu_irq *pic)
pic, 144, 4);
s->ISD_handle = cpu_register_io_memory(gt64120_read, gt64120_write, s);
d = pci_register_device(s->pci->bus, "GT64120 PCI Bus", sizeof(PCIDevice),
- 0, gt64120_read_config, gt64120_write_config);
+ 0, NULL, NULL);
/* FIXME: Malta specific hw assumptions ahead */