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authorPeter Maydell <peter.maydell@linaro.org>2012-02-16 09:56:09 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-02-17 11:13:26 +0000
commit96eacf641346bc1c432281575a265f6348a8f5c6 (patch)
tree477515b37848c790371a99bb76ccc816a5c1f488 /hw/vexpress.c
parentb7206878680f1e77031dacb420ef2c630a6b6257 (diff)
arm_boot: Pass base address of GIC CPU interface, not whole GIC
The arm_boot secondary boot loader code needs the address of the GIC CPU interface. Obtaining this from the base address of the private peripheral region was possible for A9 and 11MPcore, but the A15 puts the GIC CPU interface in a different place. So make boards pass in the GIC CPU interface address directly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/vexpress.c')
-rw-r--r--hw/vexpress.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 43ad206f0..aae9d8170 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -115,6 +115,7 @@ typedef void DBoardInitFn(const VEDBoardInfo *daughterboard,
struct VEDBoardInfo {
const target_phys_addr_t *motherboard_map;
target_phys_addr_t loader_start;
+ const target_phys_addr_t gic_cpu_if_addr;
DBoardInitFn *init;
};
@@ -175,8 +176,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
- vexpress_binfo.smp_priv_base = 0x1e000000;
- sysbus_mmio_map(busdev, 0, vexpress_binfo.smp_priv_base);
+ sysbus_mmio_map(busdev, 0, 0x1e000000);
for (n = 0; n < smp_cpus; n++) {
sysbus_connect_irq(busdev, n, cpu_irq[n]);
}
@@ -214,6 +214,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
static const VEDBoardInfo a9_daughterboard = {
.motherboard_map = motherboard_legacy_map,
.loader_start = 0x60000000,
+ .gic_cpu_if_addr = 0x1e000100,
.init = a9_daughterboard_init,
};
@@ -316,6 +317,7 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
vexpress_binfo.loader_start = daughterboard->loader_start;
vexpress_binfo.smp_loader_start = map[VE_SRAM];
vexpress_binfo.smp_bootreg_addr = map[VE_SYSREGS] + 0x30;
+ vexpress_binfo.gic_cpu_if_addr = daughterboard->gic_cpu_if_addr;
arm_load_kernel(first_cpu, &vexpress_binfo);
}