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authorMichael S. Tsirkin <mst@redhat.com>2009-06-21 19:49:40 +0300
committerAnthony Liguori <aliguori@us.ibm.com>2009-06-24 09:09:14 -0500
commitbd4b65ee5e5f750da709ac10c70266876e515c23 (patch)
treef780e46ae2bf055c0ea288603e9eef36a7d55fb8 /hw/pci.h
parent6f4cbd3950b10ceec95fcda3946839be2e009027 (diff)
qemu/pci: check constant registers on load
Add "cmask" table of constant register masks: if a bit is not writeable and is set in cmask table, this bit is checked on load. An attempt to load an image that would change such a register causes load to fail. Use this table to make sure that load does not modify registers that guest can not change (directly or indirectly). Note: we can't just assume that read-only registers never change, because the guest could change a register indirectly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pci.h')
-rw-r--r--hw/pci.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h
index d07477f84..8b5edef00 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -101,6 +101,7 @@ typedef struct PCIIORegion {
#define PCI_COMMAND_MASTER 0x4 /* Enable bus master */
#define PCI_STATUS 0x06 /* 16 bits */
#define PCI_REVISION_ID 0x08 /* 8 bits */
+#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
#define PCI_CLASS_DEVICE 0x0a /* Device class */
#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
@@ -159,6 +160,10 @@ struct PCIDevice {
/* PCI config space */
uint8_t config[PCI_CONFIG_SPACE_SIZE];
+ /* Used to enable config checks on load. Note that writeable bits are
+ * never checked even if set in cmask. */
+ uint8_t cmask[PCI_CONFIG_SPACE_SIZE];
+
/* Used to implement R/W bytes */
uint8_t wmask[PCI_CONFIG_SPACE_SIZE];