diff options
| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-01 18:59:50 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-01 18:59:50 +0000 |
| commit | 8da3ff180974732fc4272cb4433fef85c1822961 (patch) | |
| tree | f23cfaffa61efb36aa46dfeb771ad33cbfd4f3aa /hw/mst_fpga.c | |
| parent | 6ad1d22b15c0a091edb1d8efc983c1d75f74ef45 (diff) | |
Change MMIO callbacks to use offsets, not absolute addresses.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mst_fpga.c')
| -rw-r--r-- | hw/mst_fpga.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/hw/mst_fpga.c b/hw/mst_fpga.c index 2d5ac5ae8..9327952cf 100644 --- a/hw/mst_fpga.c +++ b/hw/mst_fpga.c @@ -14,7 +14,6 @@ /* Mainstone FPGA for extern irqs */ #define FPGA_GPIO_PIN 0 #define MST_NUM_IRQS 16 -#define MST_BASE MST_FPGA_PHYS #define MST_LEDDAT1 0x10 #define MST_LEDDAT2 0x14 #define MST_LEDCTRL 0x40 @@ -29,7 +28,6 @@ #define MST_PCMCIA1 0xe4 typedef struct mst_irq_state{ - target_phys_addr_t target_base; qemu_irq *parent; qemu_irq *pins; @@ -83,7 +81,6 @@ static uint32_t mst_fpga_readb(void *opaque, target_phys_addr_t addr) { mst_irq_state *s = (mst_irq_state *) opaque; - addr -= s->target_base; switch (addr) { case MST_LEDDAT1: @@ -121,7 +118,6 @@ static void mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) { mst_irq_state *s = (mst_irq_state *) opaque; - addr -= s->target_base; value &= 0xffffffff; switch (addr) { @@ -231,7 +227,6 @@ qemu_irq *mst_irq_init(struct pxa2xx_state_s *cpu, uint32_t base, int irq) if (!s) return NULL; - s->target_base = base; s->parent = &cpu->pic[irq]; /* alloc the external 16 irqs */ @@ -240,7 +235,7 @@ qemu_irq *mst_irq_init(struct pxa2xx_state_s *cpu, uint32_t base, int irq) iomemtype = cpu_register_io_memory(0, mst_fpga_readfn, mst_fpga_writefn, s); - cpu_register_physical_memory(MST_BASE, 0x00100000, iomemtype); + cpu_register_physical_memory(base, 0x00100000, iomemtype); register_savevm("mainstone_fpga", 0, 0, mst_fpga_save, mst_fpga_load, s); return qi; } |