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authorBeth Kon <eak@us.ibm.com>2009-07-24 12:26:59 -0400
committerAnthony Liguori <aliguori@us.ibm.com>2009-07-27 14:08:23 -0500
commitce536cfd1c33bf1a59a02436a025ddc7ef3a63b6 (patch)
tree5476332d116224bfb12a5e470ebe9a67b4774185 /hw/hpet_emul.h
parentbb53fc5394201c0cbe3c89a1c9fa5fbd6a3b832c (diff)
HPET fixes for reg writes
This patch addresses the problems found by Andriy Gapon: - The code was incorrectly overwriting the high order 32 bits of the timer and hpet config registers. This didn't show up in testing because linux and windows use hpet in legacy mode, where the high order 32 bits (advertising available interrupts) of the timer config register are ignored, and the high order 32 bits of the hpet config register are reserved and unused. - The mask for level-triggered interrupts was off by a bit. (hpet doesn't currently support level-triggered interrupts). In addition, I removed some unused #defines, and corrected the ioapic interrupt values advertised. I'd set this up early in hpet development and never went back to correct it, and no bugs resulted since linux and windows use hpet in legacy mode where available interrupts are ignored. Signed-off-by: Beth Kon <eak@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/hpet_emul.h')
-rw-r--r--hw/hpet_emul.h7
1 files changed, 1 insertions, 6 deletions
diff --git a/hw/hpet_emul.h b/hw/hpet_emul.h
index 60893b65d..3258d8bde 100644
--- a/hw/hpet_emul.h
+++ b/hw/hpet_emul.h
@@ -18,12 +18,7 @@
#define FS_PER_NS 1000000
#define HPET_NUM_TIMERS 3
-#define HPET_TIMER_TYPE_LEVEL 1
-#define HPET_TIMER_TYPE_EDGE 0
-#define HPET_TIMER_DELIVERY_APIC 0
-#define HPET_TIMER_DELIVERY_FSB 1
-#define HPET_TIMER_CAP_FSB_INT_DEL (1 << 15)
-#define HPET_TIMER_CAP_PER_INT (1 << 4)
+#define HPET_TIMER_TYPE_LEVEL 0x002
#define HPET_CFG_ENABLE 0x001
#define HPET_CFG_LEGACY 0x002