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authorPaul Brook <paul@codesourcery.com>2010-04-05 19:34:51 +0100
committerPaul Brook <paul@codesourcery.com>2010-04-05 19:43:12 +0100
commit983fe82611b87a1198d32f58636f6f38b88ad337 (patch)
tree5736751719ff68c4da6729108b1d1d524710a2a7 /hw/armv7m.c
parent116348def2bb446d972bdc2f44bd77ff631f85de (diff)
ARMv7-M reset fixes
Move ARMv7-M PC/SP initialization to the CPU reset routine. Add a board reset routine to call this. Also load values directly from ROM as images have not been copied yet. Avoid clearing the NVIC pointer on cpu reset. Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'hw/armv7m.c')
-rw-r--r--hw/armv7m.c22
1 files changed, 8 insertions, 14 deletions
diff --git a/hw/armv7m.c b/hw/armv7m.c
index 35f75735b..854261d94 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -151,6 +151,12 @@ static void armv7m_bitband_init(void)
}
/* Board init. */
+
+static void armv7m_reset(void *opaque)
+{
+ cpu_reset((CPUState *)opaque);
+}
+
/* Init CPU and memory for a v7-M based board.
flash_size and sram_size are in kb.
Returns the NVIC array. */
@@ -163,7 +169,6 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
/* FIXME: make this local state. */
static qemu_irq pic[64];
qemu_irq *cpu_pic;
- uint32_t pc;
int image_size;
uint64_t entry;
uint64_t lowaddr;
@@ -201,7 +206,7 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
armv7m_bitband_init();
nvic = qdev_create(NULL, "armv7m_nvic");
- env->v7m.nvic = nvic;
+ env->nvic = nvic;
qdev_init_nofail(nvic);
cpu_pic = arm_pic_init_cpu(env);
sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
@@ -227,24 +232,13 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
exit(1);
}
- /* If the image was loaded at address zero then assume it is a
- regular ROM image and perform the normal CPU reset sequence.
- Otherwise jump directly to the entry point. */
- if (lowaddr == 0) {
- env->regs[13] = ldl_phys(0);
- pc = ldl_phys(4);
- } else {
- pc = entry;
- }
- env->thumb = pc & 1;
- env->regs[15] = pc & ~1;
-
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
cpu_register_physical_memory(0xfffff000, 0x1000,
qemu_ram_alloc(0x1000) | IO_MEM_RAM);
+ qemu_register_reset(armv7m_reset, env);
return pic;
}