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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-03 12:35:38 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-03 12:35:38 +0000
commit501e23c4e83d059a0281c2d0bb3818c05af09573 (patch)
treeadbc5169dc67504c483f188c33f2b8ac70e06186
parentdf9247b2647f5bdc255bb4002d9577cade7d93ac (diff)
target-ppc: fix TGC type mismatch introduced by r6146
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6147 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-ppc/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 72df569a0..fc9be79c9 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx) \
TCGv_i32 t0 = tcg_temp_local_new_i32(); \
TCGv_i32 t1 = tcg_temp_local_new_i32(); \
TCGv_i32 t2 = tcg_temp_local_new_i32(); \
- TCGv_i64 t3 = tcg_temp_local_new(); \
+ TCGv_i64 t3 = tcg_temp_local_new_i64(); \
tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]); \
tcg_op(t0, t0, t2); \