transport/serial: Fix serial transport

Fix a typo that broke the serial transport.

Change-Id: I7fcc97d505a5369f9f14d4a2abda92b7114a58cd

1 files changed, 3 insertions, 3 deletions

diff --git a/pySim/transport/serial.py b/pySim/transport/serial.py
index 5b15b2f..7a2bfd3 100644
--- a/pySim/transport/serial.py
+++ b/pySim/transport/serial.py
@@ -143,19 +143,19 @@ class SerialSimLink(LinkBase):
 		for i in range(4):
 			if t0 & (0x10 << i):
 				b = self._rx_byte()
-				self._atr.apend(ord(b))
+				self._atr.append(ord(b))
 				self._dbg_print("T%si = %x" % (chr(ord('A')+i), ord(b)))
 
 		for i in range(0, t0 & 0xf):
 			b = self._rx_byte()
-			self._atr.apend(ord(b))
+			self._atr.append(ord(b))
 			self._dbg_print("Historical = %x" % ord(b))
 
 		while True:
 			x = self._rx_byte()
 			if not x:
 				break
-			self._atr.apend(ord(x))
+			self._atr.append(ord(x))
 			self._dbg_print("Extra: %x" % ord(x))
 
 		return 1