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authorThomas Waldmann <tw AT waldmann-edv DOT de>2011-01-11 19:38:59 +0100
committerSteve Markgraf <steve@steve-m.de>2011-01-11 19:53:56 +0100
commitbe9ea273b38167c00ca1e392c60eb794178232d5 (patch)
treed5c07e31007b516b05ca06080067fe0e444d1bc5 /src/target/firmware/rf
parent579edab27ab0d2e8980d59d86f862904def7df90 (diff)
fixed typos in comments
Signed-off-by: Steve Markgraf <steve@steve-m.de>
Diffstat (limited to 'src/target/firmware/rf')
-rw-r--r--src/target/firmware/rf/trf6151.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/firmware/rf/trf6151.c b/src/target/firmware/rf/trf6151.c
index b465611d..179f9f90 100644
--- a/src/target/firmware/rf/trf6151.c
+++ b/src/target/firmware/rf/trf6151.c
@@ -38,7 +38,7 @@
enum trf6151_reg {
REG_RX = 0, /* RF general settings */
REG_PLL = 1, /* PLL settings */
- REG_PWR = 2, /* Power on/off funcitonal blocks */
+ REG_PWR = 2, /* Power on/off functional blocks */
REG_CFG = 3, /* Transceiver and PA controller settings */
REG_TEST1 = 4,
REG_TEST2 = 5,
@@ -87,7 +87,7 @@ enum trf6151_reg {
#define PLL_VAL(a, b) ((a << 3) | (((b)-64) << 9))
-/* All values in qbits unless otherwise speciifed */
+/* All values in qbits unless otherwise specified */
#define TRF6151_LDO_DELAY_TS 6 /* six TDMA frames (at least 25ms) */
#define TRF6151_RX_PLL_DELAY 184 /* 170 us */
#define TRF6151_TX_PLL_DELAY 260 /* 240 us */