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authorHarald Welte <laforge@gnumonks.org>2010-02-23 01:23:50 +0100
committerHarald Welte <laforge@gnumonks.org>2010-02-23 01:44:14 +0100
commit9fe66fdb0c649600cbd6cc8ebf27758f5924e7b6 (patch)
tree2cebdc2d7a1407d0f47ae27e241088c54637a311 /src/target/firmware/rf
parent68817f6508ac380eb45a9eed093cc924833fd37a (diff)
TRF6151: move PLL and AGC configuration to right sequence in time
Diffstat (limited to 'src/target/firmware/rf')
-rw-r--r--src/target/firmware/rf/trf6151.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/firmware/rf/trf6151.c b/src/target/firmware/rf/trf6151.c
index f7962d0d..6b9691f2 100644
--- a/src/target/firmware/rf/trf6151.c
+++ b/src/target/firmware/rf/trf6151.c
@@ -367,13 +367,13 @@ void trf6151_rx_window(int16_t start_qbits, uint16_t arfcn, uint8_t vga_dbm, int
{
int16_t start_pll_qbits;
- /* Set the AGC and PLL registers right now, not time critical */
- trf6151_set_gain(vga_dbm, rf_gain_high);
- trf6151_set_arfcn(arfcn, 0);
-
/* power up at the right time _before_ the 'start_qbits' point in time */
start_pll_qbits = add_mod5000(start_qbits, -(TRF6151_RX_PLL_DELAY + TRF6151_RX_TPU_DELAY));
tpu_enq_at(start_pll_qbits);
+
+ /* Set the AGC and PLL registers */
+ trf6151_set_arfcn(arfcn, 0);
+ trf6151_set_gain(vga_dbm, rf_gain_high);
trf6151_set_mode(TRF6151_RX);
/* FIXME: power down at the right time again */