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authorChristian Vogel <vogelchr@vogel.cx>2010-10-04 20:10:42 +0200
committerSteve Markgraf <steve@steve-m.de>2011-01-02 16:43:25 +0100
commit65b078fa20de57fd11f631ef3cf5073047322add (patch)
tree030e31d0daad3e6ca3c9f6ffdea18838d86c2df3
parent897b41a90c4c3fd86563ccc3b1ad14c9041cae06 (diff)
Testing for the idle i2c bus was done backwards, we have
to wait for the bit to become 0, not 1.
-rw-r--r--src/target/firmware/calypso/i2c.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/firmware/calypso/i2c.c b/src/target/firmware/calypso/i2c.c
index a46fd72a..2231990b 100644
--- a/src/target/firmware/calypso/i2c.c
+++ b/src/target/firmware/calypso/i2c.c
@@ -52,7 +52,7 @@ enum i2c_reg {
#define I2C_STATUS_ERROR_DATA (1 << 0)
#define I2C_STATUS_ERROR_DEV (1 << 1)
-#define I2C_STATUS_IDLE (1 << 2)
+#define I2C_STATUS_IDLE (1 << 2) // 1: not idle, 0: idle
#define I2C_STATUS_INTERRUPT (1 << 3)
int i2c_write(uint8_t chip, uint32_t addr, int alen, const uint8_t *buffer, int len)
@@ -92,7 +92,7 @@ int i2c_write(uint8_t chip, uint32_t addr, int alen, const uint8_t *buffer, int
while (1) {
uint8_t reg = readb(I2C_REG(STATUS_ACTIVITY_REG));
printd("I2C Status: 0x%02x\n", rerg & 0xf);
- if (reg & I2C_STATUS_IDLE)
+ if (!(reg & I2C_STATUS_IDLE)) // 0: idle 1: not idle
break;
}
dputs("I2C transfer completed\n");