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authorMychaela Falconia <falcon@freecalypso.org>2020-09-28 19:07:40 +0000
committerHarald Welte <laforge@osmocom.org>2020-10-01 01:48:43 +0200
commite8bad6eaa6f4e9036740d02a38112f6837524c78 (patch)
tree6ec49a6f3bcd92d1228170bb10b203233ad660ba
parent15aa4a083bfac705151390680e1649084061b04a (diff)
firmware: gtm900b: fix GPIO configuration
This change fixes one bug and one uncertainty: Bug: Huawei defined Calypso GPIO 3 to be DTR input on this modem, following TI's precedent from C-Sample and D-Sample platforms. (Huawei's documentation calls the corresponding FPC interface pin UART_DTR without even mentioning that it is actually wired to Calypso GPIO 3 in the hardware.) The previous code (erroneously copied from gta0x target which is different in this regard) configured this GPIO to be an output, creating a driver conflict. Uncertainty: GPIOs 4, 6, 10, 11 and 12 power up as inputs, and Huawei's official fw leaves them as such. But in the absence of someone reverse-engineering a sacrificial GTM900 module by slicing its PCB and imaging its copper layers and vias, we don't know if these Calypso pins are simply unconnected like they are on Openmoko devices (in which case they are floating inputs and should be switched to driving dummy outputs), or if they are tied off in the hardware in one way or another, in which case leaving them as inputs is correct. On the reasoning that floating inputs are a lesser evil than driver conflicts or shorted outputs, leave these GPIOs as inputs until we gain better knowledge of this aspect of the hardware. Related: OS#4769 Change-Id: Ia41f8bc19fb1775b0587fe1ceaa8acd066710aa5
-rw-r--r--src/target/firmware/board/gtm900b/init.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/target/firmware/board/gtm900b/init.c b/src/target/firmware/board/gtm900b/init.c
index 38ede10c..f04d3140 100644
--- a/src/target/firmware/board/gtm900b/init.c
+++ b/src/target/firmware/board/gtm900b/init.c
@@ -67,14 +67,12 @@ static void board_io_init(void)
writew(reg, ASIC_CONF_REG);
/*
- * Most Calypso peripheral interface signals are unconnected
- * on this modem. We configure them to be GPIOs in IO_CONF_REG,
- * then configure them to be outputs in IO_CNTL_REG, then set
- * the outputs to 0 in ARMIO_LATCH_OUT.
+ * Configure Calypso GPIO and multifunction pins the same way
+ * how Huawei's official firmware configures them.
*/
writew(0x03F5, IO_CONF_REG);
- writew(0xC000, IO_CNTL_REG);
- writew(0x0000, ARMIO_LATCH_OUT);
+ writew(0xDC58, IO_CNTL_REG);
+ writew(0x0007, ARMIO_LATCH_OUT);
/* Set LPG output permanently on (power LED) */
writew(1, LPG_PM_REG);