From ac0ee1289a959fd0308be006b74799a617106378 Mon Sep 17 00:00:00 2001 From: "kurtis.heimerl" Date: Mon, 28 Nov 2011 06:25:58 +0000 Subject: transceiver, uhd: runtime check for setting master clock rate Before setting the master clock rate, make sure that the device is capable of being set. For now, assume that devices that operate with default clock rates above 64 MHz, specifically USRP2/N200/N210, cannot be set at 52 MHz. Inform the user that these devices can be used with the compile time option of host based resampling. Signed-off-by: Thomas Tsou git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2697 19bc5d8c-e614-43d4-8b26-e1612bc8e597 --- Transceiver52M/UHDDevice.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Transceiver52M') diff --git a/Transceiver52M/UHDDevice.cpp b/Transceiver52M/UHDDevice.cpp index 4eba136..32f6d0f 100644 --- a/Transceiver52M/UHDDevice.cpp +++ b/Transceiver52M/UHDDevice.cpp @@ -31,6 +31,9 @@ #include "config.h" #endif +#define U1_DEFAULT_CLK_RT 64e6 +#define U2_DEFAULT_CLK_RT 100e6 + /* master_clk_rt - Master clock frequency - ignored if host resampling is enabled @@ -325,6 +328,14 @@ double uhd_device::set_rates(double rate) double actual_rt, actual_clk_rt; #ifndef RESAMPLE + // Make sure we can set the master clock rate on this device + actual_clk_rt = usrp_dev->get_master_clock_rate(); + if (actual_clk_rt > U1_DEFAULT_CLK_RT) { + LOG(ALERT) << "Cannot set clock rate on this device"; + LOG(ALERT) << "Please compile with host resampling support"; + return -1.0; + } + // Set master clock rate usrp_dev->set_master_clock_rate(master_clk_rt); actual_clk_rt = usrp_dev->get_master_clock_rate(); -- cgit v1.2.3