diff options
| author | Thomas Tsou <tom@tsou.cc> | 2013-10-30 21:18:55 -0400 |
|---|---|---|
| committer | Thomas Tsou <tom@tsou.cc> | 2013-11-15 23:32:35 -0500 |
| commit | 7e4e536b1bfc9b20df6b30d427de29e3cc5bf5cf (patch) | |
| tree | 31b73f9d77cc616c57cd9cc61ca9d608533205e9 /Transceiver52M/arm/convert_neon.S | |
| parent | 204a9f135ac2408dd62b55462ebe4b2d10be4f56 (diff) | |
Transceiver52M: Add ARM NEON support
Similar to the existing Intel SSE cases, add support for NEON vector
floating point SIMD processing. In this case, use ARM assembly
directly as the NEON intrinsics do not generate preferential code
output.
Currently support NEON vectorized convolution and floating point
integer conversions.
Signed-off-by: Thomas Tsou <tom@tsou.cc>
Diffstat (limited to 'Transceiver52M/arm/convert_neon.S')
| -rw-r--r-- | Transceiver52M/arm/convert_neon.S | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/Transceiver52M/arm/convert_neon.S b/Transceiver52M/arm/convert_neon.S new file mode 100644 index 0000000..842ed9f --- /dev/null +++ b/Transceiver52M/arm/convert_neon.S @@ -0,0 +1,51 @@ +/* + * NEON type conversions + * Copyright (C) 2012, 2013 Thomas Tsou <tom@tsou.cc> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + + .syntax unified + .text + .align 2 + .global neon_convert_ps_si16_4n + .type neon_convert_ps_si16_4n, %function +neon_convert_ps_si16_4n: + vld1.32 {q1}, [r2] +.loop_fltint: + vld1.64 {d0-d1}, [r1]! + vmul.f32 q0, q1 + vcvt.s32.f32 q2, q0 + vqmovn.s32 d0, q2 + vst1.64 {d0}, [r0]! + subs r3, #1 + bne .loop_fltint + bx lr + .size neon_convert_ps_si16_4n, .-neon_convert_ps_si16_4n + .text + .align 2 + .global neon_convert_si16_ps_4n + .type neon_convert_si16_ps_4n, %function +neon_convert_si16_ps_4n: +.loop_intflt: + vld1.64 {d0}, [r1]! + vmovl.s16 q1, d0 + vcvt.f32.s32 q0, q1 + vst1.64 {q0}, [r0]! + subs r2, #1 + bne .loop_intflt + bx lr + .size neon_convert_si16_ps_4n, .-neon_convert_si16_ps_4n + .section .note.GNU-stack,"",%progbits |