Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2021-02-07 | ngff-breakout: update sch, brd and BOM to current production run of v3ngff-v3 | Martin Schramm | 1 | -202/+202 | |
2021-01-11 | ngff-breakout: remove solder cream for SMT stand-off GND area | Martin Schramm | 1 | -44/+195 | |
...means screws from both sides, but enables changing to either position for 3042 and 3052 cards | |||||
2021-01-11 | ngff-breakout: add BOM attributes for 2.45mm stand-off and M.2 conn | Martin Schramm | 1 | -58/+58 | |
2020-11-09 | ngff-breakout: commit a v3 candidate for 3042 and 3052 cards | Martin Schramm | 1 | -428/+1481 | |
* PCBA now supports 3042 and 3052 M.2/NGFF cards * PCBA is now 100 m taller * fourth MHf4-SMA connector combination w/ TVS | |||||
2020-01-09 | ngff: add product links to all one- and two-row 2,54mm pin header | Martin Schramm | 1 | -25/+360 | |
2019-10-18 | ngff: revert increased clearance for supply net classngff-v2 | Martin Schramm | 1 | -2/+1 | |
...and instead change class membership of an affected wire. | |||||
2019-10-18 | ngff: PCB cosmetics and subsequent DRC; rearrange SMA + MHF4 conn | Martin Schramm | 1 | -6/+3842 | |
2019-10-18 | ngff: swap Rx and Tx (solves OS#4230) | Martin Schramm | 1 | -19/+57 | |
2019-10-17 | ngff: connect pin 4 @X2 to GND (solves OS#4216) | Martin Schramm | 1 | -46/+54 | |
2019-09-25 | ngff: add / refresh most ext'd attribs for eBOM | Martin Schramm | 1 | -110/+134 | |
2019-09-24 | ngff: re-introduce and re-position OSHW logo and bott silk screen | Martin Schramm | 1 | -157/+157 | |
2019-09-24 | ngff: 2/2 make room for 2x5 header and route SIM2 signals there | Martin Schramm | 1 | -379/+373 | |
...and run ERC/DRC adresses OS#4211 | |||||
2019-09-20 | ngff: make room for 2x5 header and route SIM2 signals there | Martin Schramm | 1 | -29/+404 | |
adresses OS#4211 | |||||
2019-09-19 | ngff: remove bogus packages names with '@1' by re-importing std lib | Martin Schramm | 1 | -117/+92 | |
2019-09-19 | ngff: move PCIe header 3mm inwards (solves OS#4210) | Martin Schramm | 1 | -518/+663 | |
... and started OS#4211. | |||||
2019-09-17 | ngff: set R9 to 100k (solves OS#4209) | Martin Schramm | 1 | -234/+234 | |
2019-09-17 | ngff: repair M.2/NGFF footprint (see SYS#4661) | Martin Schramm | 1 | -38/+5 | |
2019-08-29 | ngff: finishing work | Martin Schramm | 1 | -916/+1002 | |
2019-08-29 | ngff-breakout: almost ready | Martin Schramm | 1 | -2004/+4374 | |
missing: more vias, more ext. attributes (for BOM) | |||||
2019-08-29 | ngff-breakout: intermediate state | Martin Schramm | 1 | -1568/+1349 | |
2019-08-29 | ngff-breakout: Update con-ngff.lbr to get PCIe lanes | Harald Welte | 1 | -0/+26 | |
2019-08-29 | ngff-breakout: Partial migration over to NGFF | Harald Welte | 1 | -976/+369 | |
The mPCIe slot has been removed and the NGFF slot added. Basic connections have been made in the schematics, but it's far from being complete. No effort on the PCB routing has been made so far. | |||||
2019-08-29 | ngff-breakout: Rename "mPCIe" -> "NGFF WWAN" and re-start version at v1 | Harald Welte | 1 | -3/+3 | |
2019-08-29 | Add ngff-breakout as copy of mpcie-breakout | Harald Welte | 1 | -0/+14465 | |
... ngff specific modifications will follow |