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path: root/clock-generator/clock-generator.sch
AgeCommit message (Expand)AuthorFilesLines
2019-01-28clock-gen: Add BOM information + PDF exports of schematicsHarald Welte1-225/+2023
2019-01-27clock-gen: Minor changes; final version as orderedHarald Welte1-1/+1
2019-01-27clock-gen: Cosmetic changesHarald Welte1-966/+952
2019-01-27clock-gen: finish routing of PCB layoutHarald Welte1-177/+771
2019-01-26clock-gen: Connect EEPROM WP to GND to disable write-protectHarald Welte1-0/+4
2019-01-26clock-gen: Add SPI; UEXT header; mounting holes; do layout/routingHarald Welte1-23/+550
2019-01-23clock-generator: Most of the layoutHarald Welte1-1577/+1909
2019-01-23clock-generator: More schematics work; initial placement/groupingHarald Welte1-0/+509
2019-01-21clock-generator: More work on schematics (USB, UART, ESD)Harald Welte1-57/+868
2019-01-16initial check-in of upcoming clock-generator boardHarald Welte1-0/+4176