summaryrefslogtreecommitdiffstats
path: root/clock-generator
AgeCommit message (Expand)AuthorFilesLines
2019-06-19clock-generator: Move GND via to avoid overlap with N$15Harald Welte1-6/+6
2019-06-19<osmo-clock-gen: add more TVS for exposed signals, clean up and finishMartin Schramm2-536/+1391
2019-06-19osmo-clock-gen: capacitive coupling for XA input needed - added 100nMartin Schramm2-58/+101
2019-06-19clock-generator: compacting + place MTA100 header (solves OSM#4050)Martin Schramm2-1208/+509
2019-06-19clock-generator: changes adressing OSM#4050Martin Schramm2-1831/+2677
2019-06-19clock-generator: insert changes discussed so far for v2Martin Schramm2-4207/+7211
2019-06-19clock-generator: add tracking LDO, make PCB four layerMartin Schramm2-634/+1045
2019-06-19WIP: click-generator: Replace U3 (so far SAMD11) with SAMD21Harald Welte2-775/+696
2019-01-28clock-gen: Add BOM information + PDF exports of schematicsHarald Welte5-298/+3653
2019-01-27clock-gen: Update gpio spreadsheet with all assignmentsHarald Welte1-30/+73
2019-01-27clock-gen: Minor changes; final version as orderedHarald Welte2-40/+52
2019-01-27clock-gen: Cosmetic changesHarald Welte2-1118/+1177
2019-01-27clock-gen: finish routing of PCB layoutHarald Welte4-442/+1596
2019-01-26clock-gen: Connect EEPROM WP to GND to disable write-protectHarald Welte2-0/+6
2019-01-26clock-gen: Add SPI; UEXT header; mounting holes; do layout/routingHarald Welte3-177/+1042
2019-01-23clock-generator: Most of the layoutHarald Welte2-2093/+2770
2019-01-23clock-generator: More schematics work; initial placement/groupingHarald Welte2-0/+2366
2019-01-21clock-generator: More work on schematics (USB, UART, ESD)Harald Welte1-57/+868
2019-01-16initial check-in of upcoming clock-generator boardHarald Welte9-0/+114422