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-rw-r--r--xhfc-breakout/xhfc-breakout.sch1140
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diff --git a/xhfc-breakout/xhfc-breakout.sch b/xhfc-breakout/xhfc-breakout.sch
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+++ b/xhfc-breakout/xhfc-breakout.sch
@@ -0,0 +1,1140 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="7.7.0">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
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+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
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+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="no"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="no" active="no"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="no" active="no"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="no"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="no" active="no"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="no"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="no"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="no"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="no"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="no" active="no"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="no"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="no" active="no"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="no"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="no"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="no"/>
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+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="no"/>
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+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="no"/>
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+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="no"/>
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+<layer number="254" name="OrgLBR" color="13" fill="1" visible="no" active="no"/>
+</layers>
+<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R">
+<libraries>
+<library name="frames">
+<description>&lt;b&gt;Frames for Sheet and Layout&lt;/b&gt;</description>
+<packages>
+</packages>
+<symbols>
+<symbol name="DINA4_L">
+<frame x1="0" y1="0" x2="264.16" y2="180.34" columns="4" rows="4" layer="94" border-left="no" border-top="no" border-right="no" border-bottom="no"/>
+</symbol>
+<symbol name="DOCFIELD">
+<wire x1="0" y1="0" x2="71.12" y2="0" width="0.1016" layer="94"/>
+<wire x1="101.6" y1="15.24" x2="87.63" y2="15.24" width="0.1016" layer="94"/>
+<wire x1="0" y1="0" x2="0" y2="5.08" width="0.1016" layer="94"/>
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+<wire x1="101.6" y1="15.24" x2="101.6" y2="5.08" width="0.1016" layer="94"/>
+<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1016" layer="94"/>
+<wire x1="71.12" y1="5.08" x2="87.63" y2="5.08" width="0.1016" layer="94"/>
+<wire x1="71.12" y1="0" x2="101.6" y2="0" width="0.1016" layer="94"/>
+<wire x1="87.63" y1="15.24" x2="87.63" y2="5.08" width="0.1016" layer="94"/>
+<wire x1="87.63" y1="15.24" x2="0" y2="15.24" width="0.1016" layer="94"/>
+<wire x1="87.63" y1="5.08" x2="101.6" y2="5.08" width="0.1016" layer="94"/>
+<wire x1="101.6" y1="5.08" x2="101.6" y2="0" width="0.1016" layer="94"/>
+<wire x1="0" y1="15.24" x2="0" y2="22.86" width="0.1016" layer="94"/>
+<wire x1="101.6" y1="35.56" x2="0" y2="35.56" width="0.1016" layer="94"/>
+<wire x1="101.6" y1="35.56" x2="101.6" y2="22.86" width="0.1016" layer="94"/>
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+<wire x1="0" y1="22.86" x2="0" y2="35.56" width="0.1016" layer="94"/>
+<wire x1="101.6" y1="22.86" x2="101.6" y2="15.24" width="0.1016" layer="94"/>
+<text x="1.27" y="1.27" size="2.54" layer="94">Date:</text>
+<text x="12.7" y="1.27" size="2.54" layer="94">&gt;LAST_DATE_TIME</text>
+<text x="72.39" y="1.27" size="2.54" layer="94">Sheet:</text>
+<text x="86.36" y="1.27" size="2.54" layer="94">&gt;SHEET</text>
+<text x="88.9" y="11.43" size="2.54" layer="94">REV:</text>
+<text x="1.27" y="19.05" size="2.54" layer="94">TITLE:</text>
+<text x="1.27" y="11.43" size="2.54" layer="94">Document Number:</text>
+<text x="17.78" y="19.05" size="2.54" layer="94">&gt;DRAWING_NAME</text>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="DINA4_L" prefix="FRAME" uservalue="yes">
+<description>&lt;b&gt;FRAME&lt;/b&gt;&lt;p&gt;
+DIN A4, landscape with extra doc field</description>
+<gates>
+<gate name="G$1" symbol="DINA4_L" x="0" y="0"/>
+<gate name="G$2" symbol="DOCFIELD" x="162.56" y="0" addlevel="must"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="xhfc">
+<packages>
+<package name="LQFP64">
+<description>copied from atmel-arm.lbr</description>
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+<rectangle x1="4.95" y1="-0.85" x2="6" y2="-0.65" layer="51"/>
+<rectangle x1="4.95" y1="-0.35" x2="6" y2="-0.15" layer="51"/>
+<rectangle x1="5.375" y1="-0.275" x2="5.575" y2="0.775" layer="51" rot="R270"/>
+<rectangle x1="5.375" y1="0.225" x2="5.575" y2="1.275" layer="51" rot="R270"/>
+<rectangle x1="5.375" y1="0.725" x2="5.575" y2="1.775" layer="51" rot="R270"/>
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+<rectangle x1="5.375" y1="2.225" x2="5.575" y2="3.275" layer="51" rot="R270"/>
+<rectangle x1="5.375" y1="2.725" x2="5.575" y2="3.775" layer="51" rot="R270"/>
+<rectangle x1="5.375" y1="3.225" x2="5.575" y2="4.275" layer="51" rot="R270"/>
+<rectangle x1="3.65" y1="4.95" x2="3.85" y2="6" layer="51"/>
+<rectangle x1="3.15" y1="4.95" x2="3.35" y2="6" layer="51"/>
+<rectangle x1="2.65" y1="4.95" x2="2.85" y2="6" layer="51"/>
+<rectangle x1="2.15" y1="4.95" x2="2.35" y2="6" layer="51"/>
+<rectangle x1="1.225" y1="5.375" x2="2.275" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="0.725" y1="5.375" x2="1.775" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="0.225" y1="5.375" x2="1.275" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-0.275" y1="5.375" x2="0.775" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-0.775" y1="5.375" x2="0.275" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-1.275" y1="5.375" x2="-0.225" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-1.775" y1="5.375" x2="-0.725" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-2.275" y1="5.375" x2="-1.225" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-2.775" y1="5.375" x2="-1.725" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-3.275" y1="5.375" x2="-2.225" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-3.775" y1="5.375" x2="-2.725" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-4.275" y1="5.375" x2="-3.225" y2="5.575" layer="51" rot="R270"/>
+<rectangle x1="-5.575" y1="3.225" x2="-5.375" y2="4.275" layer="51" rot="R90"/>
+<rectangle x1="-5.575" y1="2.725" x2="-5.375" y2="3.775" layer="51" rot="R90"/>
+<rectangle x1="-5.575" y1="2.225" x2="-5.375" y2="3.275" layer="51" rot="R90"/>
+<rectangle x1="-5.575" y1="1.725" x2="-5.375" y2="2.775" layer="51" rot="R90"/>
+<rectangle x1="-6" y1="1.65" x2="-4.95" y2="1.85" layer="51"/>
+<rectangle x1="-6" y1="1.15" x2="-4.95" y2="1.35" layer="51"/>
+<rectangle x1="-6" y1="0.65" x2="-4.95" y2="0.85" layer="51"/>
+<rectangle x1="-6" y1="0.15" x2="-4.95" y2="0.35" layer="51"/>
+<rectangle x1="-6" y1="-0.35" x2="-4.95" y2="-0.15" layer="51"/>
+<rectangle x1="-6" y1="-0.85" x2="-4.95" y2="-0.65" layer="51"/>
+<rectangle x1="-6" y1="-1.35" x2="-4.95" y2="-1.15" layer="51"/>
+<rectangle x1="-6" y1="-1.85" x2="-4.95" y2="-1.65" layer="51"/>
+<rectangle x1="-6" y1="-2.35" x2="-4.95" y2="-2.15" layer="51"/>
+<rectangle x1="-6" y1="-2.85" x2="-4.95" y2="-2.65" layer="51"/>
+<rectangle x1="-6" y1="-3.35" x2="-4.95" y2="-3.15" layer="51"/>
+<rectangle x1="-6" y1="-3.85" x2="-4.95" y2="-3.65" layer="51"/>
+</package>
+</packages>
+<symbols>
+<symbol name="PROC_INTF">
+<description>Processor Interface</description>
+<pin name="!INT" x="-12.7" y="33.02" length="short" direction="out"/>
+<pin name="MODE0" x="-12.7" y="25.4" length="short" direction="in"/>
+<pin name="MODE1" x="-12.7" y="22.86" length="short" direction="in"/>
+<pin name="!RES" x="-12.7" y="17.78" length="short" direction="in"/>
+<pin name="!WAIT" x="-12.7" y="7.62" length="short" direction="in"/>
+<pin name="ALE" x="-12.7" y="5.08" length="short" direction="in"/>
+<pin name="!IOW" x="-12.7" y="2.54" length="short" direction="in"/>
+<pin name="!IOR" x="-12.7" y="0" length="short" direction="in"/>
+<pin name="!CS/SPISEL" x="-12.7" y="-2.54" length="short" direction="in"/>
+<pin name="A0/SPI_GND" x="-12.7" y="-7.62" length="short" direction="in"/>
+<pin name="D7/SPI_TX" x="-12.7" y="-15.24" length="short"/>
+<pin name="D6/SPI_RX" x="-12.7" y="-17.78" length="short"/>
+<pin name="D5/SPI_GND" x="-12.7" y="-20.32" length="short"/>
+<pin name="D4/SPI_GND" x="-12.7" y="-22.86" length="short"/>
+<pin name="D3/SPI_GND" x="-12.7" y="-25.4" length="short"/>
+<pin name="D2/SPI_GND" x="-12.7" y="-27.94" length="short"/>
+<pin name="D1/SPI_GND" x="-12.7" y="-30.48" length="short"/>
+<pin name="D0/SPI_GND" x="-12.7" y="-33.02" length="short"/>
+<wire x1="-10.16" y1="35.56" x2="-10.16" y2="-35.56" width="0.254" layer="94"/>
+<wire x1="-10.16" y1="-35.56" x2="12.7" y2="-35.56" width="0.254" layer="94"/>
+<wire x1="12.7" y1="-35.56" x2="12.7" y2="35.56" width="0.254" layer="94"/>
+<wire x1="12.7" y1="35.56" x2="-10.16" y2="35.56" width="0.254" layer="94"/>
+<text x="11.43" y="-36.576" size="1.27" layer="95" rot="R180">&gt;NAME</text>
+<text x="11.938" y="-34.544" size="1.27" layer="94" rot="R90">Processor Interface</text>
+</symbol>
+<symbol name="PCM">
+<pin name="F1_0/GPIO2" x="12.7" y="17.78" length="short" rot="R180"/>
+<pin name="F1_1/GPIO3" x="12.7" y="15.24" length="short" rot="R180"/>
+<pin name="STIO2/GPIO5" x="12.7" y="10.16" length="short" rot="R180"/>
+<pin name="STIO1/GPIO4" x="12.7" y="7.62" length="short" rot="R180"/>
+<pin name="F0IO" x="12.7" y="5.08" length="short" rot="R180"/>
+<pin name="C4IO" x="12.7" y="2.54" length="short" rot="R180"/>
+<pin name="C2IO" x="12.7" y="0" length="short" rot="R180"/>
+<pin name="SYNC_O/GPIO6" x="12.7" y="-5.08" length="short" rot="R180"/>
+<pin name="SYNC_I" x="12.7" y="-7.62" length="short" rot="R180"/>
+<pin name="PWM0/GPIO0" x="12.7" y="-15.24" length="short" rot="R180"/>
+<pin name="PWM1/GPIO1" x="12.7" y="-17.78" length="short" rot="R180"/>
+<wire x1="10.16" y1="20.32" x2="-12.7" y2="20.32" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="20.32" x2="-12.7" y2="-22.86" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="-22.86" x2="10.16" y2="-22.86" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-22.86" x2="10.16" y2="20.32" width="0.254" layer="94"/>
+<text x="-11.938" y="-22.352" size="1.27" layer="94">PCM</text>
+<text x="9.906" y="-23.622" size="1.27" layer="95" rot="R180">&gt;NAME</text>
+</symbol>
+<symbol name="CLOCK">
+<pin name="WAKEUP/WD" x="12.7" y="10.16" length="short" rot="R180"/>
+<pin name="CLK_OUT/GPIO7" x="12.7" y="5.08" length="short" rot="R180"/>
+<pin name="OSC_OUT" x="12.7" y="-2.54" length="short" direction="out" rot="R180"/>
+<pin name="OSC_IN" x="12.7" y="-7.62" length="short" direction="in" rot="R180"/>
+<wire x1="10.16" y1="12.7" x2="-12.7" y2="12.7" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="12.7" x2="-12.7" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="-10.16" x2="10.16" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-10.16" x2="10.16" y2="12.7" width="0.254" layer="94"/>
+<text x="10.414" y="-10.922" size="1.27" layer="95" rot="R180">&gt;NAME</text>
+<text x="-11.938" y="-9.398" size="1.27" layer="94">CLOCK</text>
+</symbol>
+<symbol name="ST/UP">
+<pin name="VDD_SU" x="12.7" y="17.78" length="short" rot="R180"/>
+<pin name="T_B/GPIO" x="12.7" y="12.7" length="short" rot="R180"/>
+<pin name="T_A/GPIO" x="12.7" y="7.62" length="short" rot="R180"/>
+<pin name="ADJ" x="12.7" y="-2.54" length="short" rot="R180"/>
+<pin name="R_A/GPIO" x="12.7" y="-7.62" length="short" rot="R180"/>
+<pin name="L_A/GPIO" x="12.7" y="-12.7" length="short" rot="R180"/>
+<pin name="L_B/GPIO" x="12.7" y="-17.78" length="short" rot="R180"/>
+<pin name="R_B/GPIO" x="12.7" y="-22.86" length="short" rot="R180"/>
+<wire x1="10.16" y1="20.32" x2="-12.7" y2="20.32" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="20.32" x2="-12.7" y2="-25.4" width="0.254" layer="94"/>
+<wire x1="-12.7" y1="-25.4" x2="10.16" y2="-25.4" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-25.4" x2="10.16" y2="20.32" width="0.254" layer="94"/>
+<text x="-11.176" y="-24.13" size="1.27" layer="94">ST / Up</text>
+<text x="9.652" y="-26.162" size="1.27" layer="95" rot="R180">&gt;NAME</text>
+</symbol>
+<symbol name="SUPPLY">
+<pin name="VDD" x="7.62" y="10.16" length="short" direction="pas" rot="R180"/>
+<pin name="GND" x="7.62" y="-10.16" length="short" direction="pas" rot="R180"/>
+<wire x1="5.08" y1="12.7" x2="-10.16" y2="12.7" width="0.254" layer="94"/>
+<wire x1="-10.16" y1="12.7" x2="-10.16" y2="-12.7" width="0.254" layer="94"/>
+<wire x1="-10.16" y1="-12.7" x2="5.08" y2="-12.7" width="0.254" layer="94"/>
+<wire x1="5.08" y1="-12.7" x2="5.08" y2="12.7" width="0.254" layer="94"/>
+<text x="-9.144" y="-11.684" size="1.27" layer="94">SUPPLY</text>
+<text x="4.318" y="-13.716" size="1.27" layer="95" rot="R180">&gt;NAME</text>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="XHFC-2SU" prefix="U">
+<gates>
+<gate name="PROC_INTF" symbol="PROC_INTF" x="-73.66" y="17.78"/>
+<gate name="PCM" symbol="PCM" x="-40.64" y="33.02"/>
+<gate name="CLOCK" symbol="CLOCK" x="-40.64" y="-7.62"/>
+<gate name="ST/UP1" symbol="ST/UP" x="10.16" y="33.02"/>
+<gate name="ST/UP0" symbol="ST/UP" x="45.72" y="33.02"/>
+<gate name="G$1" symbol="SUPPLY" x="43.18" y="-7.62"/>
+</gates>
+<devices>
+<device name="" package="LQFP64">
+<connects>
+<connect gate="CLOCK" pin="CLK_OUT/GPIO7" pad="33"/>
+<connect gate="CLOCK" pin="OSC_IN" pad="30"/>
+<connect gate="CLOCK" pin="OSC_OUT" pad="31"/>
+<connect gate="CLOCK" pin="WAKEUP/WD" pad="34"/>
+<connect gate="G$1" pin="GND" pad="3 12 23 32 38 45 52 59"/>
+<connect gate="G$1" pin="VDD" pad="13 24 29 37 44 53 60"/>
+<connect gate="PCM" pin="C2IO" pad="18"/>
+<connect gate="PCM" pin="C4IO" pad="19"/>
+<connect gate="PCM" pin="F0IO" pad="20"/>
+<connect gate="PCM" pin="F1_0/GPIO2" pad="28"/>
+<connect gate="PCM" pin="F1_1/GPIO3" pad="27"/>
+<connect gate="PCM" pin="PWM0/GPIO0" pad="36"/>
+<connect gate="PCM" pin="PWM1/GPIO1" pad="35"/>
+<connect gate="PCM" pin="STIO1/GPIO4" pad="21"/>
+<connect gate="PCM" pin="STIO2/GPIO5" pad="22"/>
+<connect gate="PCM" pin="SYNC_I" pad="17"/>
+<connect gate="PCM" pin="SYNC_O/GPIO6" pad="16"/>
+<connect gate="PROC_INTF" pin="!CS/SPISEL" pad="1"/>
+<connect gate="PROC_INTF" pin="!INT" pad="14"/>
+<connect gate="PROC_INTF" pin="!IOR" pad="63"/>
+<connect gate="PROC_INTF" pin="!IOW" pad="64"/>
+<connect gate="PROC_INTF" pin="!RES" pad="15"/>
+<connect gate="PROC_INTF" pin="!WAIT" pad="61"/>
+<connect gate="PROC_INTF" pin="A0/SPI_GND" pad="2"/>
+<connect gate="PROC_INTF" pin="ALE" pad="62"/>
+<connect gate="PROC_INTF" pin="D0/SPI_GND" pad="11"/>
+<connect gate="PROC_INTF" pin="D1/SPI_GND" pad="10"/>
+<connect gate="PROC_INTF" pin="D2/SPI_GND" pad="9"/>
+<connect gate="PROC_INTF" pin="D3/SPI_GND" pad="8"/>
+<connect gate="PROC_INTF" pin="D4/SPI_GND" pad="7"/>
+<connect gate="PROC_INTF" pin="D5/SPI_GND" pad="6"/>
+<connect gate="PROC_INTF" pin="D6/SPI_RX" pad="5"/>
+<connect gate="PROC_INTF" pin="D7/SPI_TX" pad="4"/>
+<connect gate="PROC_INTF" pin="MODE0" pad="25"/>
+<connect gate="PROC_INTF" pin="MODE1" pad="26"/>
+<connect gate="ST/UP0" pin="ADJ" pad="54"/>
+<connect gate="ST/UP0" pin="L_A/GPIO" pad="57"/>
+<connect gate="ST/UP0" pin="L_B/GPIO" pad="56"/>
+<connect gate="ST/UP0" pin="R_A/GPIO" pad="58"/>
+<connect gate="ST/UP0" pin="R_B/GPIO" pad="55"/>
+<connect gate="ST/UP0" pin="T_A/GPIO" pad="51"/>
+<connect gate="ST/UP0" pin="T_B/GPIO" pad="50"/>
+<connect gate="ST/UP0" pin="VDD_SU" pad="49"/>
+<connect gate="ST/UP1" pin="ADJ" pad="43"/>
+<connect gate="ST/UP1" pin="L_A/GPIO" pad="40"/>
+<connect gate="ST/UP1" pin="L_B/GPIO" pad="41"/>
+<connect gate="ST/UP1" pin="R_A/GPIO" pad="39"/>
+<connect gate="ST/UP1" pin="R_B/GPIO" pad="42"/>
+<connect gate="ST/UP1" pin="T_A/GPIO" pad="46"/>
+<connect gate="ST/UP1" pin="T_B/GPIO" pad="47"/>
+<connect gate="ST/UP1" pin="VDD_SU" pad="48"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="supply1">
+<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;
+ GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;
+ Please keep in mind, that these devices are necessary for the
+ automatic wiring of the supply signals.&lt;p&gt;
+ The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;
+ In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;
+ &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+</packages>
+<symbols>
+<symbol name="GND">
+<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
+</symbol>
+<symbol name="VCC">
+<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="GND" prefix="GND">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="GND" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="VCC" prefix="P+">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="VCC" symbol="VCC" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="rc-sysmocom">
+<packages>
+<package name="0805">
+<description>&lt;b&gt;0805 (2012 Metric)&lt;/b&gt;</description>
+<wire x1="-1.873" y1="0.883" x2="1.873" y2="0.883" width="0.0508" layer="39"/>
+<wire x1="1.873" y1="-0.883" x2="-1.873" y2="-0.883" width="0.0508" layer="39"/>
+<wire x1="-1.873" y1="-0.883" x2="-1.873" y2="0.883" width="0.0508" layer="39"/>
+<wire x1="-0.381" y1="0.66" x2="0.381" y2="0.66" width="0.1016" layer="51"/>
+<wire x1="-0.356" y1="-0.66" x2="0.381" y2="-0.66" width="0.1016" layer="51"/>
+<wire x1="1.873" y1="0.883" x2="1.873" y2="-0.883" width="0.0508" layer="39"/>
+<wire x1="1.8" y1="0.9" x2="1.8" y2="-0.9" width="0.2032" layer="21"/>
+<wire x1="1.8" y1="-0.9" x2="-1.8" y2="-0.9" width="0.2032" layer="21"/>
+<wire x1="-1.8" y1="-0.9" x2="-1.8" y2="0.9" width="0.2032" layer="21"/>
+<wire x1="-1.8" y1="0.9" x2="1.8" y2="0.9" width="0.2032" layer="21"/>
+<smd name="1" x="-0.95" y="0" dx="1.3" dy="1.5" layer="1" roundness="30"/>
+<smd name="2" x="0.95" y="0" dx="1.3" dy="1.5" layer="1" roundness="30"/>
+<text x="-1.778" y="1.143" size="1.016" layer="25" font="vector" ratio="14">&gt;NAME</text>
+<text x="-1.778" y="-1.7145" size="0.508" layer="27" font="vector" ratio="10">&gt;VALUE</text>
+<rectangle x1="-1.0922" y1="-0.7239" x2="-0.3421" y2="0.7262" layer="51"/>
+<rectangle x1="0.3556" y1="-0.7239" x2="1.1057" y2="0.7262" layer="51"/>
+<rectangle x1="-0.1001" y1="-0.4001" x2="0.1001" y2="0.4001" layer="35"/>
+</package>
+<package name="1206">
+<description>&lt;b&gt;1206 (3216 Metric)&lt;/b&gt;</description>
+<wire x1="-2.473" y1="0.983" x2="2.473" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="2.473" y1="-0.983" x2="-2.473" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="-2.473" y1="-0.983" x2="-2.473" y2="0.983" width="0.0508" layer="39"/>
+<wire x1="2.473" y1="0.983" x2="2.473" y2="-0.983" width="0.0508" layer="39"/>
+<wire x1="-0.965" y1="0.787" x2="0.965" y2="0.787" width="0.1016" layer="51"/>
+<wire x1="-0.965" y1="-0.787" x2="0.965" y2="-0.787" width="0.1016" layer="51"/>
+<wire x1="-2.4" y1="1" x2="2.4" y2="1" width="0.2032" layer="21"/>
+<wire x1="2.4" y1="1" x2="2.4" y2="-1" width="0.2032" layer="21"/>
+<wire x1="2.4" y1="-1" x2="-2.4" y2="-1" width="0.2032" layer="21"/>
+<wire x1="-2.4" y1="-1" x2="-2.4" y2="1" width="0.2032" layer="21"/>
+<smd name="1" x="-1.4" y="0" dx="1.6" dy="1.8" layer="1" roundness="30" cream="no"/>
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+<rectangle x1="-1.651" y1="-1.3081" x2="-0.9009" y2="1.2918" layer="51"/>
+<rectangle x1="0.9144" y1="-1.3081" x2="1.6645" y2="1.2918" layer="51"/>
+<rectangle x1="-0.3" y1="-0.8999" x2="0.3" y2="0.8999" layer="35"/>
+<polygon width="0.3048" layer="31">
+<vertex x="-1.905" y="1.11125"/>
+<vertex x="-1.905" y="-1.11125"/>
+<vertex x="-1.27" y="-1.11125"/>
+<vertex x="-0.79375" y="0"/>
+<vertex x="-1.27" y="1.11125"/>
+</polygon>
+<polygon width="0.3048" layer="31">
+<vertex x="1.905" y="1.11125"/>
+<vertex x="1.905" y="-1.11125"/>
+<vertex x="1.27" y="-1.11125"/>
+<vertex x="0.79375" y="0"/>
+<vertex x="1.27" y="1.11125"/>
+</polygon>
+</package>
+</packages>
+<symbols>
+<symbol name="RESISTOR">
+<wire x1="-2.54" y1="1.016" x2="2.54" y2="1.016" width="0.254" layer="94"/>
+<wire x1="2.54" y1="1.016" x2="2.54" y2="-1.016" width="0.254" layer="94"/>
+<wire x1="2.54" y1="-1.016" x2="-2.54" y2="-1.016" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="-1.016" x2="-2.54" y2="1.016" width="0.254" layer="94"/>
+<text x="-2.54" y="2.286" size="1.27" layer="95">&gt;NAME</text>
+<text x="-2.54" y="-3.429" size="1.27" layer="96">&gt;VALUE</text>
+<pin name="1" x="-5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1"/>
+<pin name="2" x="5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="RESISTOR" prefix="R" uservalue="yes">
+<description>&lt;p&gt;&lt;b&gt;Resistors&lt;/b&gt;&lt;/p&gt;
+&lt;b&gt;0402&lt;/b&gt; - 0402 Surface Mount Package
+&lt;ul&gt;
+&lt;li&gt;22 Ohm 1% 1/16W [Digikey: 311-22.0LRTR-ND]&lt;/li&gt;
+&lt;li&gt;33 Ohm 5% 1/16W&lt;/li&gt;
+&lt;li&gt;1.0K 5% 1/16W&lt;/li&gt;
+&lt;li&gt;1.5K 5% 1/16W&lt;/li&gt;
+&lt;li&gt;2.0K 1% 1/16W&lt;/li&gt;
+&lt;li&gt;10.0K 1% 1/16W [Digikey: 311-10.0KLRTR-ND]&lt;/li&gt;
+&lt;li&gt;10.0K 5% 1/16W [Digikey: RMCF0402JT10K0TR-ND]&lt;/li&gt;
+&lt;li&gt;12.1K 1% 1/16W [Digikey: 311-22.0LRTR-ND]&lt;/li&gt;
+&lt;li&gt;100.0K 5% 1/16W&lt;/li&gt;
+&lt;/ul&gt;
+&lt;b&gt;0603&lt;/b&gt; - 0603 Surface Mount Package
+&lt;ul&gt;&lt;li&gt;1/10 Watt&lt;/li&gt;
+&lt;/ul&gt;
+&lt;b&gt;0805&lt;/b&gt; - 0805 Surface Mount Package
+&lt;ul&gt;
+&lt;li&gt;1/8 Watt&lt;/li&gt;
+&lt;/ul&gt;
+&lt;b&gt;1206&lt;/b&gt; - 1206 Surface Mount Package&lt;br/&gt;
+&lt;br/&gt;
+&lt;b&gt;2012&lt;/b&gt; - 2010 Surface Mount Package
+&lt;ul&gt;&lt;li&gt;0.11 Ohm 1/2 Watt 1% Resistor - Digikey: RHM.11UCT-ND&lt;/li&gt;&lt;/ul&gt;</description>
+<gates>
+<gate name="G$1" symbol="RESISTOR" x="0" y="0"/>
+</gates>
+<devices>
+<device name="0805" package="0805">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="1206" package="1206">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="0603" package="0603">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="0402" package="0402">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="2012" package="2012">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="2512" package="2512">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0402" package="_0402">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0402MP" package="_0402MP">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0603" package="_0603">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0603MP" package="_0603MP">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0805" package="_0805">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="_0805MP" package="_0805MP">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="1210" package="1210">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<parts>
+<part name="FRAME1" library="frames" deviceset="DINA4_L" device=""/>
+<part name="U1" library="xhfc" deviceset="XHFC-2SU" device=""/>
+<part name="FRAME2" library="frames" deviceset="DINA4_L" device=""/>
+<part name="GND1" library="supply1" deviceset="GND" device=""/>
+<part name="GND2" library="supply1" deviceset="GND" device=""/>
+<part name="R1" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="2k2"/>
+<part name="P+1" library="supply1" deviceset="VCC" device=""/>
+</parts>
+<sheets>
+<sheet>
+<plain>
+</plain>
+<instances>
+<instance part="FRAME1" gate="G$1" x="0" y="0"/>
+<instance part="FRAME1" gate="G$2" x="162.56" y="0"/>
+<instance part="U1" gate="PROC_INTF" x="233.68" y="132.08"/>
+<instance part="U1" gate="PCM" x="233.68" y="68.58" rot="MR0"/>
+<instance part="GND1" gate="1" x="208.28" y="157.48" rot="R270"/>
+<instance part="GND2" gate="1" x="218.44" y="93.98"/>
+<instance part="R1" gate="G$1" x="223.52" y="175.26"/>
+<instance part="P+1" gate="VCC" x="231.14" y="175.26" rot="R270"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="MODE0"/>
+<wire x1="220.98" y1="157.48" x2="218.44" y2="157.48" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="MODE1"/>
+<wire x1="218.44" y1="157.48" x2="210.82" y2="157.48" width="0.1524" layer="91"/>
+<wire x1="220.98" y1="154.94" x2="218.44" y2="154.94" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="154.94" x2="218.44" y2="157.48" width="0.1524" layer="91"/>
+<pinref part="GND1" gate="1" pin="GND"/>
+</segment>
+<segment>
+<pinref part="GND2" gate="1" pin="GND"/>
+<wire x1="218.44" y1="111.76" x2="218.44" y2="109.22" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="109.22" x2="218.44" y2="106.68" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="106.68" x2="218.44" y2="104.14" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="104.14" x2="218.44" y2="101.6" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="101.6" x2="218.44" y2="99.06" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="99.06" x2="218.44" y2="96.52" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D5/SPI_GND"/>
+<wire x1="220.98" y1="111.76" x2="218.44" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D4/SPI_GND"/>
+<wire x1="220.98" y1="109.22" x2="218.44" y2="109.22" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D3/SPI_GND"/>
+<wire x1="220.98" y1="106.68" x2="218.44" y2="106.68" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D2/SPI_GND"/>
+<wire x1="220.98" y1="104.14" x2="218.44" y2="104.14" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D1/SPI_GND"/>
+<wire x1="220.98" y1="101.6" x2="218.44" y2="101.6" width="0.1524" layer="91"/>
+<pinref part="U1" gate="PROC_INTF" pin="D0/SPI_GND"/>
+<wire x1="220.98" y1="99.06" x2="218.44" y2="99.06" width="0.1524" layer="91"/>
+<junction x="218.44" y="109.22"/>
+<junction x="218.44" y="106.68"/>
+<junction x="218.44" y="104.14"/>
+<junction x="218.44" y="101.6"/>
+<junction x="218.44" y="99.06"/>
+<pinref part="U1" gate="PROC_INTF" pin="A0/SPI_GND"/>
+<wire x1="220.98" y1="124.46" x2="218.44" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="124.46" x2="218.44" y2="111.76" width="0.1524" layer="91"/>
+<junction x="218.44" y="111.76"/>
+<pinref part="U1" gate="PROC_INTF" pin="!IOW"/>
+<wire x1="220.98" y1="134.62" x2="218.44" y2="134.62" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="134.62" x2="218.44" y2="124.46" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="SPI_CLK" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="!IOR"/>
+<wire x1="220.98" y1="132.08" x2="210.82" y2="132.08" width="0.1524" layer="91"/>
+<label x="210.82" y="132.08" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="SPI_INV" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="ALE"/>
+<wire x1="220.98" y1="137.16" x2="210.82" y2="137.16" width="0.1524" layer="91"/>
+<label x="210.82" y="137.16" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="!RES" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="!RES"/>
+<wire x1="220.98" y1="149.86" x2="210.82" y2="149.86" width="0.1524" layer="91"/>
+<label x="210.82" y="149.86" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="!INT" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="!INT"/>
+<wire x1="220.98" y1="165.1" x2="215.9" y2="165.1" width="0.1524" layer="91"/>
+<label x="210.82" y="165.1" size="1.27" layer="95" rot="R180" xref="yes"/>
+<wire x1="215.9" y1="165.1" x2="210.82" y2="165.1" width="0.1524" layer="91"/>
+<wire x1="215.9" y1="165.1" x2="215.9" y2="175.26" width="0.1524" layer="91"/>
+<pinref part="R1" gate="G$1" pin="1"/>
+<wire x1="215.9" y1="175.26" x2="218.44" y2="175.26" width="0.1524" layer="91"/>
+<junction x="215.9" y="165.1"/>
+</segment>
+</net>
+<net name="!SPISEL" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="!CS/SPISEL"/>
+<wire x1="220.98" y1="129.54" x2="210.82" y2="129.54" width="0.1524" layer="91"/>
+<label x="210.82" y="129.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="SPI_MISO" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="D7/SPI_TX"/>
+<wire x1="220.98" y1="116.84" x2="210.82" y2="116.84" width="0.1524" layer="91"/>
+<label x="210.82" y="116.84" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="SPI_MOSI" class="0">
+<segment>
+<pinref part="U1" gate="PROC_INTF" pin="D6/SPI_RX"/>
+<wire x1="220.98" y1="114.3" x2="210.82" y2="114.3" width="0.1524" layer="91"/>
+<label x="210.82" y="114.3" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="VCC" class="0">
+<segment>
+<pinref part="R1" gate="G$1" pin="2"/>
+<pinref part="P+1" gate="VCC" pin="VCC"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<plain>
+</plain>
+<instances>
+<instance part="U1" gate="ST/UP0" x="25.4" y="152.4"/>
+<instance part="U1" gate="ST/UP1" x="25.4" y="81.28"/>
+<instance part="FRAME2" gate="G$1" x="0" y="0"/>
+<instance part="FRAME2" gate="G$2" x="162.56" y="0"/>
+</instances>
+<busses>
+</busses>
+<nets>
+</nets>
+</sheet>
+</sheets>
+</schematic>
+</drawing>
+</eagle>