diff options
author | Harald Welte <laforge@gnumonks.org> | 2019-01-26 21:21:47 +0100 |
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committer | Harald Welte <laforge@gnumonks.org> | 2019-01-26 21:21:47 +0100 |
commit | 73acd67b001f359b40bb24c2b5fe5f21311ceabb (patch) | |
tree | 48e3c3b1e00d77f37cd3bfe68a0aa8538bdd1c8e | |
parent | 69aea8bd5c6c1f9d8b9a9130cbf4a299a9f0ab08 (diff) |
clock-gen: Connect EEPROM WP to GND to disable write-protect
-rw-r--r-- | clock-generator/clock-generator.brd | 2 | ||||
-rw-r--r-- | clock-generator/clock-generator.sch | 4 |
2 files changed, 6 insertions, 0 deletions
diff --git a/clock-generator/clock-generator.brd b/clock-generator/clock-generator.brd index 677c589..76db4bf 100644 --- a/clock-generator/clock-generator.brd +++ b/clock-generator/clock-generator.brd @@ -1833,6 +1833,7 @@ design rules under a new name.</description> <wire x1="19.615" y1="77.47" x2="20.828" y2="77.47" width="0.254" layer="1"/> <wire x1="20.828" y1="77.47" x2="21.59" y2="78.232" width="0.254" layer="1"/> <wire x1="23.622" y1="18.034" x2="23.876" y2="17.272" width="0.4064" layer="1"/> +<contactref element="IC1" pad="7"/> <wire x1="23.5585" y1="96.012" x2="23.114" y2="109.474" width="0" layer="19" extent="1-1"/> <wire x1="23.876" y1="23.876" x2="26.924" y2="24.892" width="0" layer="19" extent="1-1"/> <wire x1="23.114" y1="23.114" x2="23.876" y2="23.876" width="0" layer="19" extent="1-1"/> @@ -1840,6 +1841,7 @@ design rules under a new name.</description> <wire x1="23.876" y1="22.352" x2="23.114" y2="23.114" width="0" layer="19" extent="1-1"/> <wire x1="22.352" y1="22.352" x2="23.114" y2="23.114" width="0" layer="19" extent="1-1"/> <wire x1="26.285" y1="75.397" x2="21.59" y2="78.232" width="0" layer="19" extent="1-1"/> +<wire x1="32.135" y1="74.747" x2="29.718" y2="76.708" width="0" layer="19" extent="1-1"/> <wire x1="22.352" y1="88.265" x2="16.764" y2="88.9" width="0" layer="19" extent="1-1"/> </signal> <signal name="VDD" class="2"> diff --git a/clock-generator/clock-generator.sch b/clock-generator/clock-generator.sch index 17376e7..f570daa 100644 --- a/clock-generator/clock-generator.sch +++ b/clock-generator/clock-generator.sch @@ -5892,6 +5892,10 @@ Created 2014-10-08, Karrer Zheng<br> <junction x="180.34" y="86.36"/> <junction x="180.34" y="88.9"/> <pinref part="GND7" gate="1" pin="GND"/> +<pinref part="IC1" gate="G$1" pin="WP"/> +<wire x1="182.88" y1="96.52" x2="180.34" y2="96.52" width="0.1524" layer="91"/> +<wire x1="180.34" y1="96.52" x2="180.34" y2="91.44" width="0.1524" layer="91"/> +<junction x="180.34" y="91.44"/> </segment> <segment> <pinref part="X4" gate="G$1" pin="GND"/> |