diff options
-rw-r--r-- | src/bts.cpp | 107 | ||||
-rw-r--r-- | src/encoding.cpp | 78 | ||||
-rw-r--r-- | src/encoding.h | 6 | ||||
-rw-r--r-- | tests/tbf/TbfTest.cpp | 83 | ||||
-rw-r--r-- | tests/tbf/TbfTest.err | 271 | ||||
-rw-r--r-- | tests/tbf/TbfTest.ok | 4 | ||||
-rw-r--r-- | tests/types/TypesTest.cpp | 37 | ||||
-rw-r--r-- | tests/types/TypesTest.ok | 2 |
8 files changed, 520 insertions, 68 deletions
diff --git a/src/bts.cpp b/src/bts.cpp index 4aa5c2c2..4e6b5e96 100644 --- a/src/bts.cpp +++ b/src/bts.cpp @@ -475,32 +475,42 @@ int BTS::rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, uint8_t is_11bit, uint8_t trx_no, ts_no = 0; uint8_t sb = 0; uint32_t sb_fn = 0; - int rc; + int rc = 0; int plen; uint8_t usf = 7; - uint8_t tsc, ta = qta2ta(qta); + uint8_t tsc = 0, ta = qta2ta(qta); uint16_t ms_class = 0; uint16_t priority = 0; + bool failure = false; rach_frame(); - LOGP(DRLCMAC, LOGL_DEBUG, "MS requests UL TBF on RACH, so we provide " - "one:\n"); + LOGP(DRLCMAC, LOGL_DEBUG, "MS requests UL TBF on RACH, " + "so we provide one \n" + "ra=0x%02x Fn=%u qta=%d is_11bit=%d:\n", ra, Fn, qta, is_11bit); sb = is_single_block(ra, burst_type, is_11bit, &ms_class, &priority); if (sb) { rc = sba()->alloc(&trx_no, &ts_no, &sb_fn, ta); - if (rc < 0) - return rc; - LOGP(DRLCMAC, LOGL_DEBUG, "RX: [PCU <- BTS] RACH qbit-ta=%d " - "ra=0x%02x, Fn=%d (%d,%d,%d), SBFn=%d\n", - qta, ra, - Fn, (Fn / (26 * 51)) % 32, Fn % 51, Fn % 26, - sb_fn); - LOGP(DRLCMAC, LOGL_INFO, "TX: Immediate Assignment Uplink " - "(AGCH)\n"); - tsc = m_bts.trx[trx_no].pdch[ts_no].tsc; + if (rc < 0) { + failure = true; + LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource for " + "single block allocation." + "sending Immediate " + "Assignment Uplink (AGCH) reject\n"); + } else { + tsc = m_bts.trx[trx_no].pdch[ts_no].tsc; + + LOGP(DRLCMAC, LOGL_DEBUG, "RX: [PCU <- BTS] RACH " + " qbit-ta=%d ra=0x%02x, Fn=%d (%d,%d,%d)," + " SBFn=%d\n", + qta, ra, + Fn, (Fn / (26 * 51)) % 32, Fn % 51, Fn % 26, + sb_fn); + LOGP(DRLCMAC, LOGL_INFO, "TX: Immediate Assignment " + "Uplink (AGCH)\n"); + } } else { // Create new TBF #warning "Copy and paste with other routines.." @@ -515,47 +525,60 @@ int BTS::rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, uint8_t is_11bit, } if (!tbf) { - LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource\n"); - /* FIXME: send reject */ - return -EBUSY; + LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource sending " + "Immediate Assignment Uplink (AGCH) " + "reject\n"); + rc = -EBUSY; + failure = true; + } else { + tbf->set_ta(ta); + tbf->set_state(GPRS_RLCMAC_FLOW); + tbf->state_flags |= (1 << GPRS_RLCMAC_FLAG_CCCH); + tbf_timer_start(tbf, 3169, m_bts.t3169, 0); + LOGP(DRLCMAC, LOGL_DEBUG, "%s [UPLINK] START\n", + tbf_name(tbf)); + LOGP(DRLCMAC, LOGL_DEBUG, "%s RX: [PCU <- BTS] RACH " + "qbit-ta=%d ra=0x%02x, Fn=%d " + " (%d,%d,%d)\n", + tbf_name(tbf), + qta, ra, Fn, (Fn / (26 * 51)) % 32, + Fn % 51, Fn % 26); + LOGP(DRLCMAC, LOGL_INFO, "%s TX: START Immediate " + "Assignment Uplink (AGCH)\n", + tbf_name(tbf)); + trx_no = tbf->trx->trx_no; + ts_no = tbf->first_ts; + usf = tbf->m_usf[ts_no]; + tsc = tbf->tsc(); } - tbf->set_ta(ta); - tbf->set_state(GPRS_RLCMAC_FLOW); - tbf->state_flags |= (1 << GPRS_RLCMAC_FLAG_CCCH); - tbf_timer_start(tbf, 3169, m_bts.t3169, 0); - LOGP(DRLCMAC, LOGL_DEBUG, "%s [UPLINK] START\n", - tbf_name(tbf)); - LOGP(DRLCMAC, LOGL_DEBUG, "%s RX: [PCU <- BTS] RACH " - "qbit-ta=%d ra=0x%02x, Fn=%d (%d,%d,%d)\n", - tbf_name(tbf), - qta, ra, Fn, (Fn / (26 * 51)) % 32, Fn % 51, Fn % 26); - LOGP(DRLCMAC, LOGL_INFO, "%s TX: START Immediate " - "Assignment Uplink (AGCH)\n", tbf_name(tbf)); - trx_no = tbf->trx->trx_no; - ts_no = tbf->first_ts; - usf = tbf->m_usf[ts_no]; - tsc = tbf->tsc(); } bitvec *immediate_assignment = bitvec_alloc(22) /* without plen */; bitvec_unhex(immediate_assignment, "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b"); - LOGP(DRLCMAC, LOGL_DEBUG, - " - TRX=%d (%d) TS=%d TA=%d TSC=%d TFI=%d USF=%d\n", - trx_no, m_bts.trx[trx_no].arfcn, ts_no, ta, tsc, - tbf ? tbf->tfi() : -1, usf); - plen = Encoding::write_immediate_assignment( - tbf, immediate_assignment, 0, ra, Fn, ta, - m_bts.trx[trx_no].arfcn, ts_no, tsc, usf, 0, sb_fn, - m_bts.alpha, m_bts.gamma, -1, burst_type, sb); + if (failure) + plen = Encoding::write_immediate_assignment_reject( + immediate_assignment, ra, Fn, + burst_type); + else { + LOGP(DRLCMAC, LOGL_DEBUG, + " - TRX=%d (%d) TS=%d TA=%d TSC=%d TFI=%d USF=%d\n", + trx_no, m_bts.trx[trx_no].arfcn, ts_no, ta, tsc, + tbf ? tbf->tfi() : -1, usf); + + plen = Encoding::write_immediate_assignment( + tbf, immediate_assignment, 0, ra, Fn, ta, + m_bts.trx[trx_no].arfcn, ts_no, tsc, usf, 0, sb_fn, + m_bts.alpha, m_bts.gamma, -1, burst_type, sb); + } if (plen >= 0) pcu_l1if_tx_agch(immediate_assignment, plen); bitvec_free(immediate_assignment); - return 0; + return rc; } uint8_t BTS::is_single_block(uint16_t ra, enum ph_burst_type burst_type, diff --git a/src/encoding.cpp b/src/encoding.cpp index fb80eeba..ca72b0fb 100644 --- a/src/encoding.cpp +++ b/src/encoding.cpp @@ -242,6 +242,84 @@ static int write_ia_rest_egprs_uplink( } /* + * Immediate assignment reject, sent on the CCCH/AGCH + * see GSM 44.018, 9.1.20 + 10.5.2.30 + */ +int Encoding::write_immediate_assignment_reject( + bitvec *dest, uint16_t ra, + uint32_t ref_fn, + enum ph_burst_type burst_type) +{ + unsigned wp = 0; + int plen; + int i; + + bitvec_write_field(dest, wp, 0x0, 4); // Skip Indicator + bitvec_write_field(dest, wp, 0x6, 4); // Protocol Discriminator + bitvec_write_field(dest, wp, 0x3A, 8); // Immediate Assign Message Type + + // feature indicator + bitvec_write_field(dest, wp, 0x0, 1); // spare + bitvec_write_field(dest, wp, 0x0, 1); // spare + bitvec_write_field(dest, wp, 0x0, 1); // no cs + bitvec_write_field(dest, wp, 0x1, 1); // implicit detach for PS + + bitvec_write_field(dest, wp, 0x0, 4); // Page Mode + /* + * 9.1.20.2 of 44.018 version 11.7.0 Release 11 + * Filling of the message + * If necessary the request reference information element and the + * wait indication information element should be duplicated to + * fill the message. + * TODO: group rejection for multiple MS + */ + for (i = 0; i < 4; i++) { + //10.5.2.30 Request Reference + if (((burst_type == GSM_L1_BURST_TYPE_ACCESS_1) || + (burst_type == GSM_L1_BURST_TYPE_ACCESS_2))) { + //9.1.20.2a of 44.018 version 11.7.0 Release 11 + bitvec_write_field(dest, wp, 0x7f, 8); /* RACH value */ + } else { + bitvec_write_field(dest, wp, ra, 8); /* RACH value */ + } + + bitvec_write_field(dest, wp, + (ref_fn / (26 * 51)) % 32, 5); // T1' + bitvec_write_field(dest, wp, ref_fn % 51, 6); // T3 + bitvec_write_field(dest, wp, ref_fn % 26, 5); // T2 + + /* TODO: Make it configurable */ + bitvec_write_field(dest, wp, 20, 8); //Wait Indication 1 + } + + plen = wp / 8; + + if ((wp % 8)) { + LOGP(DRLCMACUL, LOGL_ERROR, "Length of IMM.ASS.Rej without" + "rest octets is not multiple of 8 bits, PLEASE FIX!\n"); + return -1; + } + + // Extended RA + else if (((burst_type == GSM_L1_BURST_TYPE_ACCESS_1) || + (burst_type == GSM_L1_BURST_TYPE_ACCESS_2))) { + //9.1.20.2a of 44.018 version 11.7.0 Release 11 + uint8_t extended_ra = 0; + + extended_ra = (ra & 0x1F); + bitvec_write_field(dest, wp, 0x1, 1); + bitvec_write_field(dest, wp, extended_ra, 5); /* Extended RA */ + } else { + bitvec_write_field(dest, wp, 0x0, 1); + } + bitvec_write_field(dest, wp, 0x0, 1); + bitvec_write_field(dest, wp, 0x0, 1); + bitvec_write_field(dest, wp, 0x0, 1); + + return plen; +} + +/* * Immediate assignment, sent on the CCCH/AGCH * see GSM 04.08, 9.1.18 and GSM 44.018, 9.1.18 + 10.5.2.16 */ diff --git a/src/encoding.h b/src/encoding.h index 69f8cdc9..79dc32dd 100644 --- a/src/encoding.h +++ b/src/encoding.h @@ -52,6 +52,12 @@ public: GSM_L1_BURST_TYPE_ACCESS_0, uint8_t sb = 1); + static int write_immediate_assignment_reject( + bitvec *dest, uint16_t ra, + uint32_t ref_fn, + enum ph_burst_type burst_type + ); + static void write_packet_uplink_assignment( struct gprs_rlcmac_bts *bts, bitvec * dest, uint8_t old_tfi, diff --git a/tests/tbf/TbfTest.cpp b/tests/tbf/TbfTest.cpp index cc483926..339390b2 100644 --- a/tests/tbf/TbfTest.cpp +++ b/tests/tbf/TbfTest.cpp @@ -1372,6 +1372,88 @@ static void test_tbf_single_phase() printf("=== end %s ===\n", __func__); } +/* + * Trigger rach for single block + */ +static void test_immediate_assign_rej_single_block() +{ + BTS the_bts; + uint32_t fn = 2654218; + uint16_t qta = 31; + int ts_no = 7; + + printf("=== start %s ===\n", __func__); + + setup_bts(&the_bts, ts_no, 4); + + the_bts.bts_data()->trx[0].pdch[ts_no].disable(); + + uint32_t rach_fn = fn - 51; + + int rc = 0; + + /* + * simulate RACH, sends an Immediate Assignment + * Uplink reject on the AGCH + */ + rc = the_bts.rcv_rach(0x70, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + + OSMO_ASSERT(rc == -EINVAL); + + printf("=== end %s ===\n", __func__); +} + +/* + * Trigger rach till resources(USF) exhaust + */ +static void test_immediate_assign_rej_multi_block() +{ + BTS the_bts; + uint32_t fn = 2654218; + uint16_t qta = 31; + int ts_no = 7; + + printf("=== start %s ===\n", __func__); + + setup_bts(&the_bts, ts_no, 4); + + uint32_t rach_fn = fn - 51; + + int rc = 0; + + /* + * simulate RACH, sends an Immediate Assignment Uplink + * reject on the AGCH + */ + rc = the_bts.rcv_rach(0x78, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x79, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7a, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7b, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7c, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7d, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7e, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + rc = the_bts.rcv_rach(0x7f, rach_fn, qta, 0, + GSM_L1_BURST_TYPE_ACCESS_0); + + OSMO_ASSERT(rc == -EBUSY); + + printf("=== end %s ===\n", __func__); +} + +static void test_immediate_assign_rej() +{ + test_immediate_assign_rej_multi_block(); + test_immediate_assign_rej_single_block(); +} + static void test_tbf_two_phase() { BTS the_bts; @@ -2791,6 +2873,7 @@ int main(int argc, char **argv) test_tbf_update_ws(); test_tbf_li_decoding(); test_tbf_epdan_out_of_rx_window(); + test_immediate_assign_rej(); if (getenv("TALLOC_REPORT_FULL")) talloc_report_full(tall_pcu_ctx, stderr); diff --git a/tests/tbf/TbfTest.err b/tests/tbf/TbfTest.err index fc3a1134..627cdc30 100644 --- a/tests/tbf/TbfTest.err +++ b/tests/tbf/TbfTest.err @@ -1510,7 +1510,8 @@ msg block (BSN 2, CS-1): 07 01 04 4d 03 03 03 03 03 03 03 03 03 03 03 03 03 03 0 MSG = 07 01 04 4d 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 Searching for first unallocated TFI: TRX=0 Found TFI=0. -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x03 Fn=2654167 qta=31 is_11bit=0: ********** TBF starts here ********** Allocating UL TBF: MS_CLASS=0/0 Creating MS object, TLLI = 0x00000000 @@ -1531,7 +1532,7 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START -TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654167 (17,25,9) +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654167 (17,25,9) TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 03 8b 29 07 00 c8 00 10 0b 2b 2b 2b 2b 2b 2b 2b @@ -1584,9 +1585,10 @@ TX: START TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) Immediate Assignment Do Sending data request: trx=0 ts=0 sapi=3 arfcn=0 fn=0 block=0 data=33 34 34 2d 06 3f 30 0f 00 00 7d 80 00 07 00 df 12 23 34 48 00 23 2b 2b 2b 2b TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) append Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -1669,9 +1671,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=NULL) changes state from NULL to ASSIGN TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) starting timer 0. TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) append Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -1803,9 +1806,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) downlink (V(A)==0 .. V(S)==1) - Copying data unit 0 (BSN 0) msg block (BSN 0, CS-4): 07 01 00 29 52 41 55 5f 41 43 43 45 50 54 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 00 Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654283 block=11 data=00 01 00 29 52 41 55 5f 41 43 43 45 50 54 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 00 -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654232 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654232 (17,39,22), SBFn=2654335 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654232 (17,39,22), SBFn=2654335 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8c f6 07 00 c0 0c 68 ab 2b 2b 2b 2b 2b 2b 2b @@ -1879,9 +1883,10 @@ TBF(TFI=0 TLLI=0xf5667788 DIR=DL STATE=FINISHED) append Modifying MS object, TLLI: 0xf5667788 confirmed New MS: TLLI = 0xf5667788, TA = 7, IMSI = 0011223344, LLC = 1 Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -1972,9 +1977,10 @@ PDCH(TS 7, TRX 0): Detaching TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW), 0 TBF Detaching TBF from MS object, TLLI = 0xf1223344, TBF = TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW) ********** TBF ends here ********** Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654275 block=9 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654224 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654224 (17,31,14), SBFn=2654327 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654224 (17,31,14), SBFn=2654327 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b ee 07 00 c0 0c 60 6b 2b 2b 2b 2b 2b 2b 2b @@ -2056,9 +2062,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW): data_length=20, data=00 00 00 00 0 - No gaps in received block, last block: BSN=0 CV=15 New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2 Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -2150,7 +2157,8 @@ Detaching TBF from MS object, TLLI = 0xf1223344, TBF = TBF(TFI=0 TLLI=0xf1223344 ********** TBF ends here ********** Searching for first unallocated TFI: TRX=0 Found TFI=0. -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x03 Fn=2654275 qta=31 is_11bit=0: ********** TBF starts here ********** Allocating UL TBF: MS_CLASS=0/0 Creating MS object, TLLI = 0x00000000 @@ -2171,7 +2179,7 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START -TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654275 (17,31,13) +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654275 (17,31,13) TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 03 8b ed 07 00 c8 00 10 0b 2b 2b 2b 2b 2b 2b 2b @@ -2210,9 +2218,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW) changes state from FLOW to FINISHED - Scheduling Ack/Nack, because last block has CV==0. New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2 Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -3344,9 +3353,10 @@ Detaching TBF from MS object, TLLI = 0x00000000, TBF = TBF(TFI=0 TLLI=0x00000000 Destroying MS object, TLLI = 0x00000000 ********** TBF ends here ********** Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -3436,9 +3446,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=NULL EGPRS) changes state from NULL to AS TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN EGPRS) starting timer 0. TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN EGPRS) append Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -6198,9 +6209,10 @@ Detaching TBF from MS object, TLLI = 0xffeeddcc, TBF = TBF(TFI=0 TLLI=0xffeeddcc Destroying MS object, TLLI = 0xffeeddcc ********** TBF ends here ********** Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -6370,9 +6382,10 @@ Detaching TBF from MS object, TLLI = 0x00000000, TBF = TBF(TFI=0 TLLI=0x00000000 Destroying MS object, TLLI = 0x00000000 ********** TBF ends here ********** Sending data request: trx=0 ts=7 sapi=5 arfcn=0 fn=2654218 block=8 data=47 94 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b -MS requests UL TBF on RACH, so we provide one: +MS requests UL TBF on RACH, so we provide one +ra=0x73 Fn=2654167 qta=31 is_11bit=0: MS requests single block allocation -RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 +RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270 TX: Immediate Assignment Uplink (AGCH) - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7 Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 73 8b 29 07 00 c0 0c 5a 43 2b 2b 2b 2b 2b 2b 2b @@ -6627,3 +6640,209 @@ PDCH(TS 4, TRX 0): Detaching TBF(TFI=0 TLLI=0xffeeddcc DIR=DL STATE=RELEASING EG Detaching TBF from MS object, TLLI = 0xffeeddcc, TBF = TBF(TFI=0 TLLI=0xffeeddcc DIR=DL STATE=RELEASING EGPRS) Destroying MS object, TLLI = 0xffeeddcc ********** TBF ends here ********** +MS requests UL TBF on RACH, so we provide one +ra=0x78 Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=0 USF=0 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL), 1 TBFs, USFs = 01, TFIs = 00000001. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x78, Fn=2654167 (17,25,9) +TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 78 8b 29 07 00 c8 00 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x79 Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=1 USF=1 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL), 2 TBFs, USFs = 03, TFIs = 00000003. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x79, Fn=2654167 (17,25,9) +TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=1 USF=1 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 79 8b 29 07 00 c8 42 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7a Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=2 USF=2 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL), 3 TBFs, USFs = 07, TFIs = 00000007. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7a, Fn=2654167 (17,25,9) +TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=2 USF=2 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 7a 8b 29 07 00 c8 84 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7b Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=3 USF=3 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL), 4 TBFs, USFs = 0f, TFIs = 0000000f. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7b, Fn=2654167 (17,25,9) +TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=3 USF=3 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 7b 8b 29 07 00 c8 c6 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7c Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=4 USF=4 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL), 5 TBFs, USFs = 1f, TFIs = 0000001f. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7c, Fn=2654167 (17,25,9) +TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=4 USF=4 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 7c 8b 29 07 00 c9 08 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7d Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=5 USF=5 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL), 6 TBFs, USFs = 3f, TFIs = 0000003f. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7d, Fn=2654167 (17,25,9) +TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=5 USF=5 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 7d 8b 29 07 00 c9 4a 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7e Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Assign uplink TS=7 TFI=6 USF=6 +PDCH(TS 7, TRX 0): Attaching TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL), 7 TBFs, USFs = 7f, TFIs = 0000007f. +- Setting Control TS 7 +Attaching TBF to MS object, TLLI = 0x00000000, TBF = TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) +Allocated TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL): trx = 0, ul_slots = 80, dl_slots = 00 +Modifying MS object, TLLI = 0x00000000, TA 220 -> 7 +TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW +TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer 3169. +TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START +TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7e, Fn=2654167 (17,25,9) +TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH) + - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=6 USF=6 +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=2d 06 3f 10 0f 00 00 7e 8b 29 07 00 c9 8c 70 0b 2b 2b 2b 2b 2b 2b 2b +MS requests UL TBF on RACH, so we provide one +ra=0x7f Fn=2654167 qta=31 is_11bit=0: +********** TBF starts here ********** +Allocating UL TBF: MS_CLASS=0/0 +Creating MS object, TLLI = 0x00000000 +Slot Allocation (Algorithm A) for class 0 +- Skipping TS 0, because not enabled +- Skipping TS 1, because not enabled +- Skipping TS 2, because not enabled +- Skipping TS 3, because not enabled +- Skipping TS 4, because not enabled +- Skipping TS 5, because not enabled +- Skipping TS 6, because not enabled +- Skipping TS 7, because no USF available +- Failed to allocate a TS, no USF available +No PDCH resource sending Immediate Assignment Uplink (AGCH) reject +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=4d 06 3a 10 7f 8b 29 14 7f 8b 29 14 7f 8b 29 14 7f 8b 29 14 0b 2b 2b +Destroying MS object, TLLI = 0x00000000 +MS requests UL TBF on RACH, so we provide one +ra=0x70 Fn=2654167 qta=31 is_11bit=0: +MS requests single block allocation +No PDCH available. +No PDCH resource for single block allocation.sending Immediate Assignment Uplink (AGCH) reject +Sending data request: trx=0 ts=0 sapi=2 arfcn=0 fn=0 block=0 data=4d 06 3a 10 70 8b 29 14 70 8b 29 14 70 8b 29 14 70 8b 29 14 0b 2b 2b diff --git a/tests/tbf/TbfTest.ok b/tests/tbf/TbfTest.ok index 2978d6d2..f921dfce 100644 --- a/tests/tbf/TbfTest.ok +++ b/tests/tbf/TbfTest.ok @@ -68,3 +68,7 @@ Testing retx for MCS 6 to reseg_mcs 3 === end test_tbf_li_decoding === === start test_tbf_epdan_out_of_rx_window === === end test_tbf_epdan_out_of_rx_window === +=== start test_immediate_assign_rej_multi_block === +=== end test_immediate_assign_rej_multi_block === +=== start test_immediate_assign_rej_single_block === +=== end test_immediate_assign_rej_single_block === diff --git a/tests/types/TypesTest.cpp b/tests/types/TypesTest.cpp index 8b3cfd1c..ee1c817c 100644 --- a/tests/types/TypesTest.cpp +++ b/tests/types/TypesTest.cpp @@ -427,6 +427,42 @@ static void test_rlc_dl_ul_basic() } } +void test_immediate_assign_rej() +{ + uint8_t plen; + bitvec *immediate_assignment_rej = bitvec_alloc(22); + + bitvec_unhex(immediate_assignment_rej, + "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b"); + plen = Encoding::write_immediate_assignment_reject( + immediate_assignment_rej, 112, 100, + GSM_L1_BURST_TYPE_ACCESS_1); + + printf("assignment reject: %s\n", + osmo_hexdump(immediate_assignment_rej->data, 22)); + + OSMO_ASSERT(plen == 19); + /* RA value */ + OSMO_ASSERT(immediate_assignment_rej->data[3] == 0x7f); + /* Extended RA value */ + OSMO_ASSERT(immediate_assignment_rej->data[19] == 0xc0); + + bitvec_unhex(immediate_assignment_rej, + "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b"); + + plen = Encoding::write_immediate_assignment_reject( + immediate_assignment_rej, 112, 100, + GSM_L1_BURST_TYPE_ACCESS_0); + + printf("assignment reject: %s\n", + osmo_hexdump(immediate_assignment_rej->data, 22)); + + OSMO_ASSERT(plen == 19); + /* RA value */ + OSMO_ASSERT(immediate_assignment_rej->data[3] == 0x70); + +} + int main(int argc, char **argv) { osmo_init_logging(&gprs_log_info); @@ -439,6 +475,7 @@ int main(int argc, char **argv) test_rlc_v_b(); test_rlc_v_n(); test_rlc_dl_ul_basic(); + test_immediate_assign_rej(); return EXIT_SUCCESS; } diff --git a/tests/types/TypesTest.ok b/tests/types/TypesTest.ok index cb40d398..fe5162c8 100644 --- a/tests/types/TypesTest.ok +++ b/tests/types/TypesTest.ok @@ -6,3 +6,5 @@ rbb: 00 00 00 00 00 00 00 31 rbb: 10 00 00 00 00 00 00 01 show_rbb: RRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRR show_rbb: IIRRIIIR +assignment reject: 06 3a 10 7f 06 36 14 7f 06 36 14 7f 06 36 14 7f 06 36 14 c0 2b 2b +assignment reject: 06 3a 10 70 06 36 14 70 06 36 14 70 06 36 14 70 06 36 14 0b 2b 2b |