alloc: Select applicable Tta/Tra

According to TS 45.002, 6.4.2.2 the choice whether Tta or Tra has to
be applied, depends on the medium access mode (currently always
dynamic) and the number of UL/DL slots. Currently either value can be
used which might result in combinations not covered by the spec.

This commit changes find_multi_slots() to skip non-compliant
combinations.

Note that this code will have to be extended, if other medium
access modes are implemented.

Sponsored-by: On-Waves ehf

2 files changed, 48 insertions, 13 deletions

diff --git a/src/gprs_rlcmac_ts_alloc.cpp b/src/gprs_rlcmac_ts_alloc.cpp
index ac7dcd64..f6d86471 100644
--- a/src/gprs_rlcmac_ts_alloc.cpp
+++ b/src/gprs_rlcmac_ts_alloc.cpp
@@ -505,19 +505,54 @@ static int find_multi_slots(struct gprs_rlcmac_bts *bts,
 		 * testing */
 
 		rx_window = rx_good & rx_valid_win;
-
-		/* Avoid repeated RX combination check */
-		if (test_and_set_bit(checked_rx, rx_window))
-			continue;
-
 		rx_slot_count = bitcount(rx_window);
 
 #if 0
-		LOGP(DRLCMAC, LOGL_DEBUG, "n_tx=%d, n_rx=%d, "
-			"tx=%02x, rx=%02x, mask=%02x, bad=%02x, good=%02x, ul=%02x, dl=%02x\n",
-			tx_slot_count, rx_slot_count,
-			tx_window, rx_window, rx_mask[mask_sel], rx_bad, rx_good, *ul_slots, *dl_slots);
+		LOGP(DRLCMAC, LOGL_DEBUG, "n_tx=%d, n_rx=%d, mask_sel=%d, "
+			"tx=%02x, rx=%02x, mask=%02x, bad=%02x, good=%02x, "
+			"ul=%02x, dl=%02x\n",
+			tx_slot_count, rx_slot_count, mask_sel,
+			tx_window, rx_window, rx_mask[mask_sel], rx_bad, rx_good,
+			*ul_slots, *dl_slots);
+#endif
+
+		/* Check compliance with TS 45.002, table 6.4.2.2.1 */
+		/* Whether to skip this round doesn not only depend on the bit
+		 * sets but also on mask_sel. Therefore this check must be done
+		 * before doing the test_and_set_bit shortcut. */
+		if (ms_class->type == 1) {
+			unsigned slot_sum = rx_slot_count + tx_slot_count;
+			/* Assume down+up/dynamic.
+			 * TODO: For ext-dynamic, down only, up only add more
+			 *       cases.
+			 */
+			if (slot_sum <= 6 && tx_slot_count < 3) {
+			       if (mask_sel != MASK_TR)
+				       /* Skip Tta */
+				       continue;
+			} else if (slot_sum > 6 && tx_slot_count < 3) {
+				if (mask_sel != MASK_TT)
+					/* Skip Tra */
+					continue;
+			} else {
+				/* No supported row in table 6.4.2.2.1. */
+#ifdef ENABLE_TS_ALLOC_DEBUG
+				LOGP(DRLCMAC, LOGL_DEBUG,
+					"- Skipping DL/UL slots: (TS=0)\"%s\"(TS=7), "
+					"combination not supported\n",
+					set_flag_chars(set_flag_chars(set_flag_chars(
+								slot_info,
+								rx_bad, 'x', '.'),
+							rx_window, 'D'),
+						tx_window, 'U'));
 #endif
+				continue;
+			}
+		}
+
+		/* Avoid repeated RX combination check */
+		if (test_and_set_bit(checked_rx, rx_window))
+			continue;
 
 		if (!rx_good) {
 #ifdef ENABLE_TS_ALLOC_DEBUG
diff --git a/tests/alloc/AllocTest.ok b/tests/alloc/AllocTest.ok
index 00cff6e7..cdc63354 100644
--- a/tests/alloc/AllocTest.ok
+++ b/tests/alloc/AllocTest.ok
@@ -8684,8 +8684,8 @@ Going to test assignment with many TBF, algorithm B class 12 (UL and DL)
  TBF[24] class 12 reserves ...DCD..
  TBF[25] class 12 reserves .....DCD
  TBF[26] class 12 reserves ...DDCD.
- TBF[27] class 12 reserves ....DDDC
- TBF[28] class 12 reserves ...CD...
+ TBF[27] class 12 reserves ...CD...
+ TBF[28] class 12 reserves .....DDC
  TBF[29] class 12 reserves ...CD...
  TBF[30] class 12 reserves ...CD...
  TBF[31] class 12 reserves ...CD...
@@ -8752,8 +8752,8 @@ Going to test assignment with many TBF, algorithm B class 1-29 (UL and DL)
  TBF[24] class 25 reserves ....DDCD
  TBF[25] class 26 reserves ...DCDD.
  TBF[26] class 27 reserves ....DCDD
- TBF[27] class 28 reserves ...DDDDC
- TBF[28] class 29 reserves ...DDDDC
+ TBF[27] class 28 reserves .....DDC
+ TBF[28] class 29 reserves .....DDC
  TBF[29] class 1 reserves ...C....
  TBF[30] class 2 reserves ......DC
  TBF[31] class 3 reserves ...C....