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authorHarald Welte <laforge@gnumonks.org>2012-08-19 10:40:15 +0200
committerHarald Welte <laforge@gnumonks.org>2012-08-19 10:40:15 +0200
commita7bab9ef29a17e7e5dd516cc4aa00a85cb26b301 (patch)
treeb0f8679fe464f58eda626c5797a74a36eaa26af1 /src
parent2da9aae9f651b5cc25d20693c882e4c23898a9dc (diff)
Add new CC32 GPIO functions
Diffstat (limited to 'src')
-rw-r--r--src/cc32/cc32_gpio.c87
-rw-r--r--src/cc32/cc32_gpio.h26
2 files changed, 113 insertions, 0 deletions
diff --git a/src/cc32/cc32_gpio.c b/src/cc32/cc32_gpio.c
new file mode 100644
index 0000000..a645282
--- /dev/null
+++ b/src/cc32/cc32_gpio.c
@@ -0,0 +1,87 @@
+/*
+ * ChipCity CC32RS512 GPIO controller driver
+ *
+ * Copyright (C) 2012 Harald Welte <laforge@gnumonks.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 or
+ * (at your option) version 3 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <errno.h>
+
+#include "cc32_regs.h"
+
+#include "cc32_sysc.h"
+#include "cc32_gpio.h"
+
+void cc32_gpio_output(uint8_t gpio, int output)
+{
+ uint32_t reg = GPIODIR0;
+
+ if (gpio >= 32) {
+ reg = GPIODIR1;
+ gpio -= 32;
+ }
+
+ if (output)
+ *GPIO_REG(reg) &= ~(1 << gpio);
+ else
+ *GPIO_REG(reg) |= (1 << gpio);
+}
+
+void cc32_gpio_set(uint8_t gpio, int val)
+{
+ uint32_t reg = GPIODAT0;
+
+ if (gpio >= 32) {
+ reg = GPIODAT1;
+ gpio -= 32;
+ }
+
+ if (val)
+ *GPIO_REG(reg) |= (1 << gpio);
+ else
+ *GPIO_REG(reg) &= ~(1 << gpio);
+}
+
+uint8_t cc32_gpio_get(uint8_t gpio)
+{
+ uint32_t reg = GPIODAT0;
+
+ if (gpio >= 32) {
+ reg = GPIODAT1;
+ gpio -= 32;
+ }
+
+ if (*GPIO_REG(reg) & (1 << gpio))
+ return 1;
+ else
+ return 0;
+}
+
+void cc32_gpio_alt(enum cc32_gpio_port port,
+ enum cc32_gpio_alt alt)
+{
+ uint32_t tmp;
+
+ tmp = *SYSC_REG(SCGCON);
+ tmp &= ~(3 << (2*port));
+ tmp |= ((alt & 3) << (2*port));
+ *SYSC_REG(SCGCON) = tmp;
+}
+
+
+void cc32_gpio_init(void)
+{
+ cc32_sysc_clk_enable(CLK_GPIO);
+}
diff --git a/src/cc32/cc32_gpio.h b/src/cc32/cc32_gpio.h
new file mode 100644
index 0000000..ff2f3c5
--- /dev/null
+++ b/src/cc32/cc32_gpio.h
@@ -0,0 +1,26 @@
+#ifndef _CC32_GPIO_H
+#define _CC32_GPIO_H
+
+enum cc32_gpio_port {
+ CC32_GPIO_P0,
+ CC32_GPIO_P1,
+ CC32_GPIO_P2,
+ CC32_GPIO_P3,
+ CC32_GPIO_P4,
+ CC32_GPIO_P5,
+};
+
+enum cc32_gpio_alt {
+ CC32_GPIO_FUNC1,
+ CC32_GPIO_FUNC2,
+ CC32_GPIO_FUNC3,
+};
+
+void cc32_gpio_output(uint8_t gpio, int output);
+void cc32_gpio_set(uint8_t gpio, int val);
+uint8_t cc32_gpio_get(uint8_t gpio);
+void cc32_gpio_init(void);
+void cc32_gpio_alt(enum cc32_gpio_port port,
+ enum cc32_gpio_alt alt);
+
+#endif