diff options
author | Harald Welte <laforge@gnumonks.org> | 2012-08-19 10:39:44 +0200 |
---|---|---|
committer | Harald Welte <laforge@gnumonks.org> | 2012-08-19 10:39:44 +0200 |
commit | 2da9aae9f651b5cc25d20693c882e4c23898a9dc (patch) | |
tree | 08e9b6089e455f3111b3d4b4a03b097e62029166 | |
parent | 8df9d037b227cee295f0959c6b055a81ef653b2e (diff) |
move CC32 register declarations into new (internal) cc32_regs.h
-rw-r--r-- | src/cc32/cc32_irq.c | 25 | ||||
-rw-r--r-- | src/cc32/cc32_regs.h | 40 |
2 files changed, 42 insertions, 23 deletions
diff --git a/src/cc32/cc32_irq.c b/src/cc32/cc32_irq.c index d9cb62c..d7b7afc 100644 --- a/src/cc32/cc32_irq.c +++ b/src/cc32/cc32_irq.c @@ -1,30 +1,9 @@ +#include "cc32_regs.h" + #include "cc32_sysc.h" #include "cc32_irq.h" -#define CC32_SYSC_BASE 0x0F0000 - -enum cc32_sysc_reg { - SCCM0 = 0x00, - SCSYS = 0x04, - SCCKOUT = 0x20, - SCRSTFLG = 0x28, - SCRSTEN = 0x2C, - SCSFTRST = 0x30, - SCRSTCON0 = 0x34, - SCRSTCON4 = 0x38, - SCSLEEP = 0x3C, - SCGCON = 0x40, - SCINTSTS = 0x44, - SCINTEN = 0x48, - SCGINT0 = 0x5C, - SCGLEV = 0x64, - SCWUT = 0x68, - SCCM4 = 0x7C, -}; - -#define SYSC_REG(x) (uint32_t *)((uint8_t *)CC32_SYSC_BASE + x) - void cc32_irq_enable(enum cc32_irq irq) { *SYSC_REG(SCINTEN) |= (1 << irq); diff --git a/src/cc32/cc32_regs.h b/src/cc32/cc32_regs.h new file mode 100644 index 0000000..c6adad4 --- /dev/null +++ b/src/cc32/cc32_regs.h @@ -0,0 +1,40 @@ +#ifndef _CC32_REGS_H +#define _CC32_REGS_H + +#define CC32_SYSC_BASE 0x0F0000 + +enum cc32_sysc_reg { + SCCM0 = 0x00, + SCSYS = 0x04, + SCCKOUT = 0x20, + SCRSTFLG = 0x28, + SCRSTEN = 0x2C, + SCSFTRST = 0x30, + SCRSTCON0 = 0x34, + SCRSTCON4 = 0x38, + SCSLEEP = 0x3C, + SCGCON = 0x40, + SCINTSTS = 0x44, + SCINTEN = 0x48, + SCGINT0 = 0x5C, + SCGLEV = 0x64, + SCWUT = 0x68, + SCCM4 = 0x7C, +}; + +#define SYSC_REG(x) (uint32_t *)((uint8_t *)CC32_SYSC_BASE + x) + + +#define CC32_GPIO_BASE 0x0f8c00 + +enum cc32_gpio_reg { + GPIODAT0 = 0x00, + GPIODIR0 = 0x04, + GPIODAT1 = 0x08, + GPIODIR1 = 0x0C, +}; + +#define GPIO_REG(x) (uint32_t *)((uint8_t *)CC32_GPIO_BASE + x) + + +#endif /* _CC32_REGS_H */ |