From 36179bbcdf9407bcc4c06f7608f28e0dfcc29861 Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Fri, 27 Apr 2012 15:12:46 +0200 Subject: RSL / SI: Make sure to have correct LAPDm header in SI5/SI6 on SACCH SI5/SI6 and other messages on SACCH need the C/R and the EA bit set in the LAPDm header. Most devices accept a broken header, but especially the Wavecom Q2686 responds with tons of RR STATUS messages if there is any invalid bit. --- src/common/rsl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common/rsl.c') diff --git a/src/common/rsl.c b/src/common/rsl.c index d7d728a8..370e2f76 100644 --- a/src/common/rsl.c +++ b/src/common/rsl.c @@ -429,8 +429,8 @@ static int rsl_rx_sacch_fill(struct gsm_bts_trx *trx, struct msgb *msg) if (len > sizeof(sysinfo_buf_t)-2) len = sizeof(sysinfo_buf_t)-2; bts->si_valid |= (1 << osmo_si); - bts->si_buf[osmo_si][0] = 0x00; - bts->si_buf[osmo_si][1] = 0x03; + bts->si_buf[osmo_si][0] = 0x03; /* C/R + EA */ + bts->si_buf[osmo_si][1] = 0x03; /* UI frame */ memcpy(bts->si_buf[osmo_si]+2, TLVP_VAL(&tp, RSL_IE_L3_INFO), len); LOGP(DRSL, LOGL_INFO, " Rx RSL SACCH FILLING (SI%s)\n", -- cgit v1.2.3