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author | Stefan Sperling <ssperling@sysmocom.de> | 2018-03-14 20:57:23 +0100 |
---|---|---|
committer | Stefan Sperling <ssperling@sysmocom.de> | 2018-03-14 21:01:12 +0100 |
commit | 8469818e33ef81e9f707a0c4dd13d7b91ecf83f5 (patch) | |
tree | 881259ae47d52d39008ad9769406a8e54c5ce8a5 /openbsc/src/libbsc/system_information.c | |
parent | c425351e74d162c0794828c0e9a1e8c15395cae2 (diff) |
Add support for Access Control Class ramping.
Access Control Class (ACC) ramping is used to slowly make the cell
available to an increasing number of MS. This avoids overload at
startup time in cases where a lot of MS would discover the new
cell and try to connect to it all at once.
Ramping behaviour can be configured with new VTY commands:
[no] access-control-class-ramping
access-control-class-ramping-step-interval (<30-600>|dynamic)
access-control-class-ramping-step-size (<1-10>)
(The minimum and maximum values for these parameters are hard-coded,
but could be changed if they are found to be inadequate.)
The VTY command 'show bts' has been extended to display the
current ACC ramping configuration.
By default, ACC ramping is disabled.
When enabled, the default behaviour is to enable one ACC per
ramping step with a 'dynamic' step interval. This means the
ramping interval (time between steps) is scaled to the channel
load average of the BTS, i.e. the number of used vs. available
channels measured over a certain amount of time.
Below is an example of debug log output with ACC ramping enabled,
while many 'mobile' programs are concurrently trying to connect
to the network via an osmo-bts-virtual BTS. Initially, all ACCs
are barred, and then only one class is allowed. Then the current
BTS channel load average is consulted for scheduling the next
ramping step. While the channel load average is low, ramping
proceeds faster, and while it is is high, ramping proceeds slower:
(bts=0) ACC RAMP: barring Access Control Class 0
(bts=0) ACC RAMP: barring Access Control Class 1
(bts=0) ACC RAMP: barring Access Control Class 2
(bts=0) ACC RAMP: barring Access Control Class 3
(bts=0) ACC RAMP: barring Access Control Class 4
(bts=0) ACC RAMP: barring Access Control Class 5
(bts=0) ACC RAMP: barring Access Control Class 6
(bts=0) ACC RAMP: barring Access Control Class 7
(bts=0) ACC RAMP: barring Access Control Class 8
(bts=0) ACC RAMP: barring Access Control Class 9
(bts=0) ACC RAMP: allowing Access Control Class 0
(bts=0) ACC RAMP: step interval set to 30 seconds based on 0% channel load average
(bts=0) ACC RAMP: allowing Access Control Class 1
(bts=0) ACC RAMP: step interval set to 354 seconds based on 59% channel load average
(bts=0) ACC RAMP: allowing Access Control Class 2
(bts=0) ACC RAMP: step interval set to 30 seconds based on 0% channel load average
(bts=0) ACC RAMP: allowing Access Control Class 3
(bts=0) ACC RAMP: step interval set to 30 seconds based on 0% channel load average
Port of osmo-bsc commit a5c1e8727c391bc56847a00b2ecc08787573b91f
Change-Id: Idd5c4fd7ea2e10086d9b26deee3a71f9469d1280
Related: OS#2591
Diffstat (limited to 'openbsc/src/libbsc/system_information.c')
-rw-r--r-- | openbsc/src/libbsc/system_information.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/openbsc/src/libbsc/system_information.c b/openbsc/src/libbsc/system_information.c index 9d40a2454..57921455a 100644 --- a/openbsc/src/libbsc/system_information.c +++ b/openbsc/src/libbsc/system_information.c @@ -37,6 +37,7 @@ #include <openbsc/abis_rsl.h> #include <openbsc/rest_octets.h> #include <openbsc/arfcn_range_encode.h> +#include <openbsc/acc_ramp.h> /* * DCS1800 and PCS1900 have overlapping ARFCNs. We would need to set the @@ -662,6 +663,8 @@ static int generate_si1(enum osmo_sysinfo_type t, struct gsm_bts *bts) list_arfcn(si1->cell_channel_description, 0xce, "Serving cell:"); si1->rach_control = bts->si_common.rach_control; + if (acc_ramp_is_enabled(&bts->acc_ramp)) + acc_ramp_apply(&si1->rach_control, &bts->acc_ramp); /* * SI1 Rest Octets (10.5.2.32), contains NCH position and band @@ -692,6 +695,8 @@ static int generate_si2(enum osmo_sysinfo_type t, struct gsm_bts *bts) si2->ncc_permitted = bts->si_common.ncc_permitted; si2->rach_control = bts->si_common.rach_control; + if (acc_ramp_is_enabled(&bts->acc_ramp)) + acc_ramp_apply(&si2->rach_control, &bts->acc_ramp); return sizeof(*si2); } @@ -725,6 +730,8 @@ static int generate_si2bis(enum osmo_sysinfo_type t, struct gsm_bts *bts) bts->si_valid &= ~(1 << SYSINFO_TYPE_2bis); si2b->rach_control = bts->si_common.rach_control; + if (acc_ramp_is_enabled(&bts->acc_ramp)) + acc_ramp_apply(&si2b->rach_control, &bts->acc_ramp); return sizeof(*si2b); } @@ -841,6 +848,8 @@ static int generate_si3(enum osmo_sysinfo_type t, struct gsm_bts *bts) si3->cell_options = bts->si_common.cell_options; si3->cell_sel_par = bts->si_common.cell_sel_par; si3->rach_control = bts->si_common.rach_control; + if (acc_ramp_is_enabled(&bts->acc_ramp)) + acc_ramp_apply(&si3->rach_control, &bts->acc_ramp); /* allow/disallow DTXu */ gsm48_set_dtx(&si3->cell_options, bts->dtxu, bts->dtxu, true); @@ -891,6 +900,8 @@ static int generate_si4(enum osmo_sysinfo_type t, struct gsm_bts *bts) bts->location_area_code); si4->cell_sel_par = bts->si_common.cell_sel_par; si4->rach_control = bts->si_common.rach_control; + if (acc_ramp_is_enabled(&bts->acc_ramp)) + acc_ramp_apply(&si4->rach_control, &bts->acc_ramp); /* Optional: CBCH Channel Description + CBCH Mobile Allocation */ cbch_lchan = gsm_bts_get_cbch(bts); |