diff options
| author | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2012-06-20 00:04:56 +0000 |
|---|---|---|
| committer | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2012-06-20 00:04:56 +0000 |
| commit | bcbeb7979ff09179a872be4dfe2333c8da1e39f0 (patch) | |
| tree | 4f225d12c9f365cdb2ceb06c8b2998edaad91341 /nuttx | |
| parent | 3fb1c4e9b32c6bbdfbcbbfc47d2b9fd336d8071e (diff) | |
Add a configuration to support the Mirtoo module
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4852 7fd9a85b-ad96-42d3-883c-3090e2eb8679
Diffstat (limited to 'nuttx')
25 files changed, 2919 insertions, 13 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index c5c1d2aa02..e2a291621b 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -2912,3 +2912,6 @@ client feature. * arch/mips/include/pic32mx and arch/mips/src/pic32mx: Add support for the PIC32MX1 and PIC32MX2 families. + * configs/mirtoo: Add a board configuration to support the DTX1-4000L + "Mirtoo" module from http://www.dimitech.com/ + diff --git a/nuttx/Documentation/NuttxPortingGuide.html b/nuttx/Documentation/NuttxPortingGuide.html index ee3c9a5e98..d73fafbfef 100644 --- a/nuttx/Documentation/NuttxPortingGuide.html +++ b/nuttx/Documentation/NuttxPortingGuide.html @@ -12,7 +12,7 @@ <h1><big><font color="#3c34ec"> <i>NuttX RTOS Porting Guide</i> </font></big></h1> - <p>Last Updated: June 13, 2012</p> + <p>Last Updated: June 19, 2012</p> </td> </tr> </table> @@ -837,6 +837,12 @@ The port supports serial, timer0, spi, and usb. </li> + <li><code>configs/mirtoo/code>: + This is the port to the DTX1-4000L "Mirtoo" module. + This module uses MicroChipPIC32MX250F128D. + See the <a href="http://www.dimitech.com/">Dimitech</a> website for further information. + </li> + <li><code>configs/mx1ads</code>: This is a port to the Motorola MX1ADS development board. That board is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. diff --git a/nuttx/Documentation/README.html b/nuttx/Documentation/README.html index 1982040e08..b36b9f00c2 100644 --- a/nuttx/Documentation/README.html +++ b/nuttx/Documentation/README.html @@ -115,6 +115,8 @@ | | | `- <a href="http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/nuttx/configs/mcu123-lpc214x/README.txt?view=log"><b><i>README.txt</i></b></a> | | |- micropendous3/ | | | `- <a href="http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/nuttx/configs/micropendous3/README.txt?view=log"><b><i>README.txt</i></b></a> + | | |- mirtoo/ + | | | `- <a href="http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/nuttx/configs/mirtoo/README.txt?view=log"><b><i>README.txt</i></b></a> | | |- mx1ads/ | | | |- <a href="http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/nuttx/configs/mx1ads/include/README.txt?view=log">include/README.txt</a> | | | |- <a href="http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/nuttx/configs/mx1ads/src/README.txt?view=log">src/README.txt</a> diff --git a/nuttx/README.txt b/nuttx/README.txt index 523bcc782d..cd7c4dda6f 100644 --- a/nuttx/README.txt +++ b/nuttx/README.txt @@ -677,6 +677,8 @@ nuttx | | `- README.txt | |- micropendous3/ | | `- README.txt + | |- mirtoo/ + | | `- README.txt | |- mx1ads/ | | |- include/README.txt | | |- src/README.txt diff --git a/nuttx/arch/mips/src/pic32mx/Kconfig b/nuttx/arch/mips/src/pic32mx/Kconfig index 9597e1eb16..26ec901a14 100644 --- a/nuttx/arch/mips/src/pic32mx/Kconfig +++ b/nuttx/arch/mips/src/pic32mx/Kconfig @@ -356,31 +356,31 @@ config ARCH_CHIP_PIC32MX795F512L endchoice -config ARCH_CHIP_PIC322MX1 +config ARCH_CHIP_PIC32MX1 bool default y if ARCH_CHIP_PIC32MX110F016B || ARCH_CHIP_PIC32MX110F016C || ARCH_CHIP_PIC32MX110F016D || ARCH_CHIP_PIC32MX120F032B || ARCH_CHIP_PIC32MX120F032C || ARCH_CHIP_PIC32MX120F032D || ARCH_CHIP_PIC32MX130F064B || ARCH_CHIP_PIC32MX130F064C || ARCH_CHIP_PIC32MX130F064D || ARCH_CHIP_PIC32MX150F128B || ARCH_CHIP_PIC32MX150F128C || ARCH_CHIP_PIC32MX150F128D -config ARCH_CHIP_PIC322MX2 +config ARCH_CHIP_PIC32MX2 bool default y if ARCH_CHIP_PIC32MX210F016B || ARCH_CHIP_PIC32MX210F016C || ARCH_CHIP_PIC32MX210F016D || ARCH_CHIP_PIC32MX220F032B || ARCH_CHIP_PIC32MX220F032C || ARCH_CHIP_PIC32MX220F032D || ARCH_CHIP_PIC32MX230F064B || ARCH_CHIP_PIC32MX230F064C || ARCH_CHIP_PIC32MX230F064D || ARCH_CHIP_PIC32MX250F128B || ARCH_CHIP_PIC32MX250F128C || ARCH_CHIP_PIC32MX250F128D -config ARCH_CHIP_PIC322MX3 +config ARCH_CHIP_PIC32MX3 bool default y if ARCH_CHIP_PIC32MX320F032H || ARCH_CHIP_PIC32MX320F064H || ARCH_CHIP_PIC32MX320F128H || ARCH_CHIP_PIC32MX320F128L || ARCH_CHIP_PIC32MX340F128H || ARCH_CHIP_PIC32MX340F256H || ARCH_CHIP_PIC32MX340F512H || ARCH_CHIP_PIC32MX340F128L || ARCH_CHIP_PIC32MX360F256L || ARCH_CHIP_PIC32MX360F512L -config ARCH_CHIP_PIC322MX4 +config ARCH_CHIP_PIC32MX4 bool default y if ARCH_CHIP_PIC32MX420F032H || ARCH_CHIP_PIC32MX440F128H || ARCH_CHIP_PIC32MX440F128L || ARCH_CHIP_PIC32MX440F256H || ARCH_CHIP_PIC32MX440F512H || ARCH_CHIP_PIC32MX460F256L || ARCH_CHIP_PIC32MX460F512L -config ARCH_CHIP_PIC322MX5 +config ARCH_CHIP_PIC32MX5 bool default y if ARCH_CHIP_PIC32MX534F064H || ARCH_CHIP_PIC32MX534F064L || ARCH_CHIP_PIC32MX564F064H || ARCH_CHIP_PIC32MX564F064L || ARCH_CHIP_PIC32MX564F128H || ARCH_CHIP_PIC32MX564F128L || ARCH_CHIP_PIC32MX575F256H || ARCH_CHIP_PIC32MX575F256L || ARCH_CHIP_PIC32MX575F512H || ARCH_CHIP_PIC32MX575F512L -config ARCH_CHIP_PIC322MX6 +config ARCH_CHIP_PIC32MX6 bool default y if ARCH_CHIP_PIC32MX664F064H || ARCH_CHIP_PIC32MX664F064L || ARCH_CHIP_PIC32MX664F128H || ARCH_CHIP_PIC32MX664F128L || ARCH_CHIP_PIC32MX675F256H || ARCH_CHIP_PIC32MX675F256L || ARCH_CHIP_PIC32MX675F512H || ARCH_CHIP_PIC32MX675F512L || ARCH_CHIP_PIC32MX695F512H || ARCH_CHIP_PIC32MX695F512L -config ARCH_CHIP_PIC322MX7 +config ARCH_CHIP_PIC32MX7 bool default y if ARCH_CHIP_PIC32MX764F128H || ARCH_CHIP_PIC32MX764F128L || ARCH_CHIP_PIC32MX775F256H || ARCH_CHIP_PIC32MX775F256L || ARCH_CHIP_PIC32MX775F512H || ARCH_CHIP_PIC32MX775F512L || ARCH_CHIP_PIC32MX795F512H || ARCH_CHIP_PIC32MX795F512L diff --git a/nuttx/configs/Kconfig b/nuttx/configs/Kconfig index 834f548577..612f0ec1a0 100644 --- a/nuttx/configs/Kconfig +++ b/nuttx/configs/Kconfig @@ -234,6 +234,13 @@ config ARCH_BOARD_LPC1766STK This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under Linux or Cygwin. STATUS: Complete and mature. +config ARCH_BOARD_MIRTOO + bool "Mirtoo PIC32 Module from Dimitech" + depends on ARCH_CHIP_PIC32MX250F128D + ---help--- + This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip + PIC32MX250F128D. See http://www.dimitech.com/ for further information. + config ARCH_BOARD_OLIMEXLPC2378 bool "Olimex-lpc2378 board" depends on ARCH_CHIP_LPC2378 diff --git a/nuttx/configs/README.txt b/nuttx/configs/README.txt index 692c7792e7..6667d0e740 100644 --- a/nuttx/configs/README.txt +++ b/nuttx/configs/README.txt @@ -1473,6 +1473,10 @@ configs/micropendous3 be populated with either an AVR AT90USB646, 647, 1286, or 1287 MCU. Support is configured for the AT90USB647. +configs/mirtoo + This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip + PIC32MX250F128D. See http://www.dimitech.com/ for further information. + configs/mx1ads This is a port to the Motorola MX1ADS development board. That board is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. diff --git a/nuttx/configs/mirtoo/Kconfig b/nuttx/configs/mirtoo/Kconfig new file mode 100644 index 0000000000..fe15952f31 --- /dev/null +++ b/nuttx/configs/mirtoo/Kconfig @@ -0,0 +1,13 @@ +# +# For a description of the syntax of this configuration file, +# see misc/tools/kconfig-language.txt. +# + +if ARCH_BOARD_MIRTOO +config ARCH_LEDS + bool "NuttX LED support" + default n + ---help--- + "Support control of board LEDs by NuttX to indicate system state" + +endif diff --git a/nuttx/configs/mirtoo/README.txt b/nuttx/configs/mirtoo/README.txt new file mode 100644 index 0000000000..6125c40d1d --- /dev/null +++ b/nuttx/configs/mirtoo/README.txt @@ -0,0 +1,630 @@ +configs/pic32mx README +===================== + +This README file discusses the port of NuttX to the DTX1-4000L "Mirtoo" module. +This module uses MicroChip PIC32MX250F128D and the Dimitech DTX1-4000L EV-kit1 +V2. See http://www.dimitech.com/ for further information. + +Contents +======== + + PIC32MX250F128D Pin Out + Toolchains + Loading NuttX with ICD3 + PIC32MX Configuration Options + Configurations + +PIC32MX250F128D Pin Out +======================= + +PIC32MX250F128D 44 pin package. + +PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE EV-Kit1 CONNECTION +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 1 RPB9/SDA1/CTED4/PMD3/RB9 FUNC3 FUNC3, to X3, pin3 + RPB9 Peripheral pin selection RB9 + SDA1 I2C1 data + CTED4 CTMU External Edge Input 4 + PMD3 Parallel Master Port data bit 3 + RB9 PORTB, Pin 9 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 2 RPC6/PMA1/RC6 FUNC5 FUNC5, to X3, pin5 + RPC6 Peripheral pin selection RC6 + PMA1 Parallel Master Port Address bit 1 + RC6 PORTC, Pin 6 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 3 RPC7/PMA0/RC7 PEN, PGA117 ENA pin Not available off module + RPC7 Peripheral pin selection RC7 Not available + PMA0 Parallel Master Port Address bit 0 Not available + RC7 PORTC, Pin 7 Used for PGA117 ENA output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 4 RPC8/PMA5/RC8 LED0 Not available off module + RPC8 Peripheral Selection, PORTC, Pin 8 Not available + PMA5 Parallel Master Port Address bit 5 Not available + RC8 PORTC, Pin 8 Used to drive LED0 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 5 RPC9/CTED7/PMA6/RC9 LED1 Not available off module + RPC9 Peripheral Selection, PORTC, Pin 9 Not available + CTED7 CTMU External Edge Input 7 Not available + PMA6 Parallel Master Port Address bit 6 Not available + RC9 PORTC, Pin 9 Used to drive LED1 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 6 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 7 VCAP VCAP Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 8 PGED2/RPB10/D+/CTED11/RB10 FUNC0 FUNC0, to FT230XS RXD + PGED2 Debug Channel 2 data Not available + RPB10 Peripheral Selection, PORTB, Pin 10 Used for UART RXD + D+ USB D+ Not available + CTED11 CTMU External Edge Input 11 Not available + RB10 PORTB, Pin 10 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + 9 PGEC2/RPB11/D-/RB11 FUNC1 FUNC1, to FT230XS TXD + PGEC2 Debug Channel 2 clock Not available + RPB11 Peripheral Selection, PORTB, Pin 11 Used for UART TXD + D- USB D- Not available + RB11 PORTB, Pin 11 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +10 VUSB3V3 3.3V (via VBAT, Pin 1) + VUSB3V3 USB internal transceiver supply 3.3V +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +11 AN11/RPB13/CTPLS/PMRD/RB13 ~CSM SST25VF3032B Chip Select Not available off-module + AN11 Analog input channel 11 Not available + RPB13 Peripheral Selection, PORTB, Pin 12 Not available + CTPLS CTMU Pulse Output Not available + PMRD Parallel Master Port read strobe Not available + RB13 PORTB, Pin 12 Used for SST25VF3032B Chip Select +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +12 PGED/TMS/PMA10/RA10 DIN5 PORT5, to X7, pin 2 + PGED4 Debug Channel 4 data (?) (also X13, pin6) + TMS JTAG Test mode select pin (?) + PMA10 Parallel Master Port Address bit 10 Not available + RA10 PORTA, Pin 10 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +13 PGEC/TCK/CTED8/PMA7/RA7 DIN2 PORT2, to X4, pin 2 + PGEC4 Debug Channel 4 clock Not available (also X13, pin5) + TCK JTAG test clock input pin May be used as JTAG clock input + CTED8 CTMU External Edge Input 8 May be used as CTMU input + PMA7 Parallel Master Port Address bit 7 Not available + RA7 PORTA, Pin 7 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +14 CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14 FUNC5 (through resistor) FUNC5, to X3, pin5 + CVREFOUT Comparator Voltage Reference output + AN10 Analog input channel 10 + C3INB Comparator 3 Input B + RPB14 Peripheral Selection, PORTB, Pin 14 + VBUSON USB Host and OTG bus power control + SCK1 SPI1 clock + CTED5 CTMU External Edge Input 5 + RB14 PORTB, Pin 14 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +15 AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15 SCK Not available off module + AN9 Analog input channel 9 Not available + C3INA Comparator 3 Input A Not available + RPB15 Peripheral Selection, PORTB, Pin 15 Not available + SCK2 SPI2 clock Used for SPI2 clock + CTED6 CTMU External Edge Input 6 Not available + PMCS1 Parallel Master Port Chip Select 1 Not available + RB15 PORTB, Pin 15 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +16 AVSS AVSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +17 AVDD AVDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +18 ~MCLR ~MCLR, TC2030-NL, pin 1 Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout + AN0 Analog input channel 0 AIN + RA0 PORTA, Pin 0 Not available + CVREF+ Comparator Voltage Reference (high) (?) + C3INC Comparator 3 Input C (?) + PMD7 Parallel Master Port data bit 7 Not available + CTED1 CTMU External Edge Input 1 Not available + PGED3 Debug Channel 3 data Not available + VREF+ Analog voltage reference (high) Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +20 PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1 SI Not available off module + PGEC3 Debug Channel 3 clock Not available + VREF- Analog voltage reference (low) Not available + CVREF- Comparator Voltage Reference (low) Not available + AN1 Analog input channel 1 Not available + RPA1 Peripheral Selection PORTA, Pin 1 Used for SI + CTED2 CTMU External Edge Input 2 Not available + PMD6 Parallel Master Port data bit 6 Not available + RA1 PORTA, Pin 1 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +21 PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0 DIN6 PORT6, to X9, pin 2 + PGED1 Debug Channel 1 data Not available (also X13, pin4) + AN2 Analog input channel 2 Not available (digital input only) + C1IND Comparator 1 Input D Not available (digital input only) + C2INB Comparator 2 Input B Not available (digital input only) + C3IND Comparator 3 Input D Not available (digital input only) + RPB0 Peripheral Selection PORTB, Pin 0 May be used for peripheral input + PMD0 Parallel Master Port data bit 0 Not available + RB0 PORTB, Pin 0 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +22 PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1 DIN7 PORT7, to X10, pin 2 + PGEC1 Debug Channel 1 clock (?) (also X13, pin2) + AN3 Analog input channel 3 Not available (digital input only) + C1INC Comparator 1 Input C Not available (digital input only) + C2INA Comparator 2 Input A Not available (digital input only) + RPB1 Peripheral Selection, PORTB, Pin 1 May be used for peripheral input + PMD1 Parallel Master Port data bit 1 Not available + CTED12 CTMU External Edge Input 12 May be used as CTMU input + RB1 PORTB, Pin 1 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +23 AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/CNB2/RB2 DOUT0 PORT0, to X1, pin 2 + AN4 Analog input channel 4 Not available (digital output only) (also X13, pin1) + C1INB Comparator 1 Input B Not available (digital output only) + C2IND Comparator 2 Input D Not available (digital output only) + RPB2 Peripheral Selection PORTB, Pin 2 May be used for peripheral output + SDA2 I2C2 data Not available(?) + CTED13 CTMU External Edge Input 13 Not available + PMD2 Parallel Master Port data bit 2 Not available + CNB2 PORTB, Pin 2 Change Notification Not available + RB2 PORTB, Pin 2 May be for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +24 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/CNB3/RB3 DOUT1 PORT1, to X2, pin 2 + AN5 Analog input channel 5 Not available (digital output only) (also X13, pin3) + C1INA Comparator 1 Input A Not available (digital output only) + C2INC Comparator 2 Input C Not available (digital output only) + RTCC Real-Time Clock alarm output May be used for RTCC output + RPB3 Peripheral Selection, PORTB, Pin 3 May be used for peripheral output + SCL2 I2C2 clock (?) + PMWR Parallel Master Port write strobe Not available + CNB3 PORTB, Pin 3 Change Notification Not available + RB3 PORTB, Pin 3 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +25 AN6/RPC0/RC0 DOUT3 PORT3, to X5, pin 2 + AN6 Analog input channel 6 Not available (digital output only) (also X13, pin7) + RPC0 Peripheral Selection, PORTC, Pin 0 May be used for peripheral output + RC0 PORTC, Pin 0 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +26 AN7/RPC1/RC1 DOUT4 PORT4, to X6, pin 2 + AN7 Analog input channel 7 Not available (digital output only) (also X13, pin8) + RPC1 Peripheral Selection, PORTC, Pin 1 May be used for peripheral output + RC1 PORTC, Pin 1 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +27 AN8/RPC2/PMA2/RC2 DOUT5 PORT5, to X7, pin 2 + AN8 Analog input channel 8 Not available (digital output only) (also X13, pin6) + RPC2 Peripheral Selection, PORTC, Pin 2 May be used for peripheral output + PMA2 Parallel Master Port Address bit 2 Not available + RC2 PORTC, Pin 2 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +28 VDD VDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +29 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +30 OSC1/CLKI/RPA2/RA2 SO Not available off module + OSC1 Oscillator crystal input Not available + CLKI External clock source input Not available + RPRA2 Peripheral Selection PORTA, Pin 2 Used for SO + RA2 PORTA, Pin 2 Not available +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +31 OSC2/CLKO/RPA3/RA3 DIN0 PORT0, to X1, pin 2 + OSC2 Oscillator crystal output Not available (also X13, pin1) + CLKO Oscillator crystal output Not available + RPA3 Peripheral Selection for PORTA, Pin 3 May be used for peripheral input + RA3 PORTA, Pin 3 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +32 TDO/RPA8/PMA8/RA8 DIN3 PORT3, to X5, pin 2 + TDO JTAG test data output pin Not available (also X13, pin7) + RPA8 PORTA, Pin 8 May be used for peripheral input + PMA8 Parallel Master Port Address bit 8 Not available + RA8 PORTA, Pin 8 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +33 SOSCI/RPB4/RB4 DOUT2 PORT2, to X4, pin 2 + SOSCI 32.768 kHz crystal input Not available (also X13, pin5) + RPB4 Peripheral Seclection, PORTB, Pin 4 May be used for peripheral output + RB4 PORTB, Pin 4 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +34 SOSCO/RPA4/T1CK/CTED9/RA4 DIN1 PORT1, to X2, pin 2 + SOSCO 32.768 kHz crystal output Not available (also X13, pin3) + RPA4 Peripheral Selection PORTA, Pin 4 May be used for peripheral input + T1CK Timer1 external clock input May be used for timer 1 input + CTED9 CTMU External Edge Input 9 May be used for CTMU input + RA4 PORTA, Pin 4 May be used as GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +35 TDI/RPA9/PMA9/RA9 DIN4 PORT4, to X6, pin 2 + TDI JTAG test data input pin May be used for JTAG input (also X13, pin8) + RPA9 Peripheral Selection for PORTA, Pin 9 May be used for peripheral input + PMA9 Parallel Master Port Address bit 9 Not available + RA9 PORTA, Pin 9 May be used for GPIO input +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +36 AN12/RPC3/RC3 DOUT6 PORT6, to X9, pin 2 + AN12 Analog input channel 12 Not available (digtial output only) (also X13, pin4) + RPC3 Peripheral Selection, PORTC, Pin 3 May be used for peripheral output + RC3 PORTC, Pin 3 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +37 RPC4/PMA4/RC4 DOUT7 PORT7, to X10, pin 2 + RPC4 Peripheral Selection, PORTC, Pin 4 May be used for peripheral output (also X13, pin2) + PMA4 Parallel Master Port Address bit 4 Not available + RC4 PORTC, Pin 4 May be used for GPIO output +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +38 RPC5/PMA3/RC5 FUNC4 FUNC4, to X3, pin4 + RPC5 Peripheral Selection, PORTC, Pin 5 + PMA3 Parallel Master Port Address bit 3 + RC5 PORTC, Pin 5 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +39 VSS VSS Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +40 VDD VDD Not available off module +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +41 RPB5/USBID/RB5 FUNC3 FUNC3, to X3, pin3 + RPB5 Peripheral Selection, PORTB, Pin 5 + USBID 41 USB OTG ID detect + RB5 41 PORTB, Pin 5 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +42 VBUS FUNC2 FUNC2, to X3, pin2 + VBUS Analog USB bus power monitor +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +43 RPB7/CTED3/PMD5/INT0/RB7 PGA117 ~CSAI Not available off module + RPB7 Peripheral Selection, PORTB, Pin 7 + CTED3 CTMU External Edge Input 3 + PMD5 Parallel Master Port data bit 5 + INT0 External Interrupt 0 + RB7 PORTB, Pin 7 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- +44 RPB8/SCL1/CTED10/PMD4/RB8 FUNC2 FUNC2 + RPB8 PORTB, Pin 8 + SCL1 I2C1 clock + CTED10 CTMU External Edge Input 10 + PMD4 Parallel Master Port data bit 4 + RB8 PORTB, Pin 8 +--- ------------------------------------------------ ---------------------------------- ---------------------------------- + +Additional signals available via Peripheral Pin Selections (PPS) +---------------------------------------------------------------- + + REFCLKI Reference Input Clock + REFCLKO Reference Output Clock + IC1 Capture Inputs 1 + IC2 Capture Inputs 2 + IC3 Capture Inputs 3 + IC4 Capture Inputs 4 + IC5 Capture Inputs 5 + OC1 Output Compare Output 1 + OC2 Output Compare Output 2 + OC3 Output Compare Output 3 + OC4 Output Compare Output 4 + OC5 Output Compare Output 5 + OCFA Output Compare Fault A Input + OCFB Output Compare Fault B Input + INT1 External Interrupt 1 + INT2 External Interrupt 2 + INT3 External Interrupt 3 + INT4 External Interrupt 4 + T2CK Timer2 external clock input + T3CK Timer3 external clock input + T4CK Timer4 external clock input + T5CK Timer5 external clock input + U1CTS UART1 clear to send + U1RTS UART1 ready to send + U1RX UART1 receive + U1TX UART1 transmit + U2CTS UART2 clear to send + U2RTS UART2 ready to send + U2RX UART2 receive + U2TX UART2 transmit + SDI1 SPI1 data in + SDO1 SPI1 data out + SS1 SPI1 slave synchronization or frame pulse I/O + SDI2 SPI2 data in + SDO2 SPI2 data out + SS2 SPI2 slave synchronization or frame pulse I/O + C1OUT Comparator 1 Output + C2OUT Comparator 2 Output + C3OUT Comparator 3 Output + +Toolchains +========== + + I am using the free, LITE version of the PIC32MX toolchain available + for download from the microchip.com web site. I am using the Windows + version. The MicroChip toolchain is the only toolchaing currently + supported in these configurations, but it should be a simple matter to + adapt to other toolchains by modifying the Make.defs file include in + each configuration. + + Toolchain Options: + + CONFIG_PIC32MX_MICROCHIPW - MicroChip full toolchain for Windows + CONFIG_PIC32MX_MICROCHIPL - MicroChip full toolchain for Linux + CONFIG_PIC32MX_MICROCHIPW_LITE - MicroChip LITE toolchain for Windows + CONFIG_PIC32MX_MICROCHIPL_LITE - MicroChip LITE toolchain for Linux + + Windows Native Toolchains + + NOTE: There are several limitations to using a Windows based toolchain in a + Cygwin environment. The three biggest are: + + 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are + performed automatically in the Cygwin makefiles using the 'cygpath' utility + but you might easily find some new path problems. If so, check out 'cygpath -w' + + 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links + are used in Nuttx (e.g., include/arch). The make system works around these + problems for the Windows tools by copying directories instead of linking them. + But this can also cause some confusion for you: For example, you may edit + a file in a "linked" directory and find that your changes had no effect. + That is because you are building the copy of the file in the "fake" symbolic + directory. If you use a Windows toolchain, you should get in the habit of + making like this: + + make clean_context all + + An alias in your .bashrc file might make that less painful. + + 3. Dependencies are not made when using Windows versions of the GCC. This is + because the dependencies are generated using Windows pathes which do not + work with the Cygwin make. + + Support has been added for making dependencies with the windows-native toolchains. + That support can be enabled by modifying your Make.defs file as follows: + + - MKDEP = $(TOPDIR)/tools/mknulldeps.sh + + MKDEP = $(TOPDIR)/tools/mkdeps.sh --winpaths "$(TOPDIR)" + + If you have problems with the dependency build (for example, if you are not + building on C:), then you may need to modify tools/mkdeps.sh + +Loading NuttX with ICD3 +======================== + + Intel Hex Forma Files: + ---------------------- + + When NuttX is built it will produce two files in the top-level NuttX + directory: + + 1) nuttx - This is an ELF file, and + 2) nuttx.hex - This is an Intel Hex format file. This is controlled by + the setting CONFIG_INTELHEX_BINARY in the .config file. + + The PICkit tool wants an Intel Hex format file to burn into FLASH. However, + there is a problem with the generated nutt.hex: The tool expects the nuttx.hex + file to contain physical addresses. But the nuttx.hex file generated from the + top-level make will have address in the KSEG0 and KSEG1 regions. + + tools/mkpichex: + --------------- + + There is a simple tool in the configs/mirtoo/tools directory + that can be used to solve both issues with the nuttx.hex file. But, + first, you must build the the tools: + + cd configs/mirtoo/tools + make + + Now you will have an excecutable file call mkpichex (or mkpichex.exe on + Cygwin). This program will take the nutt.hex file as an input, it will + convert all of the KSEG0 and KSEG1 addresses to physical address, and + it will write the modified file, replacing the original nuttx.hex. + + To use this file, you need to do the following things: + + . ./setenv.sh # Source setenv.sh. Among other this, this script + # will add configs/mirtoo/tools to your + # PATH variable + make # Build nuttx and nuttx.hex + mkpichex $PWD # Convert addresses in nuttx.hex. $PWD is the path + # to the top-level build directory. It is the only + # required input to mkpichex. + +PIC32MX Configuration Options +============================= + + General Architecture Settings: + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=mips + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_MIPS=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_MIPS32=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=pic32mx + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_PIC32MX250F128D=y + + CONFIG_ARCH_BOARD - Identifies the configs subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=mirtoo + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_MIRTOO=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_DRAM_SIZE - Describes the installed DRAM (CPU SRAM in this case): + + CONFIG_DRAM_SIZE=(32*1024) (32Kb) + + There is an additional 32Kb of SRAM in AHB SRAM banks 0 and 1. + + CONFIG_DRAM_START - The start address of installed DRAM + + CONFIG_DRAM_START=0xa0000000 + + CONFIG_DRAM_END - Last address+1 of installed RAM + + CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) + + CONFIG_ARCH_IRQPRIO - The PIC32MXx supports interrupt prioritization + + CONFIG_ARCH_IRQPRIO=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that + cause a 100 second delay during boot-up. This 100 second delay + serves no purpose other than it allows you to calibratre + CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure + the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until + the delay actually is 100 seconds. + + PIC32MX Configuration + + CONFIG_PIC32MX_MVEC - Select muli- vs. single-vectored interrupts + + Individual subsystems can be enabled: + + CONFIG_PIC32MX_WDT - Watchdog timer + CONFIG_PIC32MX_T2 - Timer 2 (Timer 1 is the system time and always enabled) + CONFIG_PIC32MX_T3 - Timer 3 + CONFIG_PIC32MX_T4 - Timer 4 + CONFIG_PIC32MX_T5 - Timer 5 + CONFIG_PIC32MX_IC1 - Input Capture 1 + CONFIG_PIC32MX_IC2 - Input Capture 2 + CONFIG_PIC32MX_IC3 - Input Capture 3 + CONFIG_PIC32MX_IC4 - Input Capture 4 + CONFIG_PIC32MX_IC5 - Input Capture 5 + CONFIG_PIC32MX_OC1 - Output Compare 1 + CONFIG_PIC32MX_OC2 - Output Compare 2 + CONFIG_PIC32MX_OC3 - Output Compare 3 + CONFIG_PIC32MX_OC4 - Output Compare 4 + CONFIG_PIC32MX_OC5 - Output Compare 5 + CONFIG_PIC32MX_I2C1 - I2C 1 + CONFIG_PIC32MX_I2C2 - I2C 2 + CONFIG_PIC32MX_SPI1 - SPI 1 + CONFIG_PIC32MX_SPI2 - SPI 2 + CONFIG_PIC32MX_UART1 - UART 1 + CONFIG_PIC32MX_UART2 - UART 2 + CONFIG_PIC32MX_ADC - ADC 1 + CONFIG_PIC32MX_PMP - Parallel Master Port + CONFIG_PIC32MX_CM1 - Comparator 1 + CONFIG_PIC32MX_CM2 - Comparator 2 + CONFIG_PIC32MX_RTCC - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA - DMA + CONFIG_PIC32MX_FLASH - FLASH + CONFIG_PIC32MX_USBDEV - USB device + CONFIG_PIC32MX_USBHOST - USB host + + PIC32MX Configuration Settings + DEVCFG0: + CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The + value 2 enables. + CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select + Default 1 (PG2) + CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) + CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) + CONFIG_PIC32MX_CODEWP - Default 1 (disabled) + DEVCFG1: (All settings determined by selections in board.h) + DEVCFG2: (All settings determined by selections in board.h) + DEVCFG3: + CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled + (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. + CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled + (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. + CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog + can be enabled later by software). + + The priority of interrupts may be specified. The value ranage of + priority is 4-31. The default (16) will be used if these any of these + are undefined. + + CONFIG_PIC32MX_CTPRIO - Core Timer Interrupt + CONFIG_PIC32MX_CS0PRIO - Core Software Interrupt 0 + CONFIG_PIC32MX_CS1PRIO - Core Software Interrupt 1 + CONFIG_PIC32MX_INT0PRIO - External Interrupt 0 + CONFIG_PIC32MX_INT1PRIO - External Interrupt 1 + CONFIG_PIC32MX_INT2PRIO - External Interrupt 2 + CONFIG_PIC32MX_INT3PRIO - External Interrupt 3 + CONFIG_PIC32MX_INT4PRIO - External Interrupt 4 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_T1PRIO - Timer 1 (System timer) priority + CONFIG_PIC32MX_T2PRIO - Timer 2 priority + CONFIG_PIC32MX_T3PRIO - Timer 3 priority + CONFIG_PIC32MX_T4PRIO - Timer 4 priority + CONFIG_PIC32MX_T5PRIO - Timer 5 priority + CONFIG_PIC32MX_IC1PRIO - Input Capture 1 + CONFIG_PIC32MX_IC2PRIO - Input Capture 2 + CONFIG_PIC32MX_IC3PRIO - Input Capture 3 + CONFIG_PIC32MX_IC4PRIO - Input Capture 4 + CONFIG_PIC32MX_IC5PRIO - Input Capture 5 + CONFIG_PIC32MX_OC1PRIO - Output Compare 1 + CONFIG_PIC32MX_OC2PRIO - Output Compare 2 + CONFIG_PIC32MX_OC3PRIO - Output Compare 3 + CONFIG_PIC32MX_OC4PRIO - Output Compare 4 + CONFIG_PIC32MX_OC5PRIO - Output Compare 5 + CONFIG_PIC32MX_I2C1PRIO - I2C 1 + CONFIG_PIC32MX_I2C2PRIO - I2C 2 + CONFIG_PIC32MX_SPI1PRIO - SPI 1 + CONFIG_PIC32MX_SPI2PRIO - SPI 2 + CONFIG_PIC32MX_UART1PRIO - UART 1 + CONFIG_PIC32MX_UART2PRIO - UART 2 + CONFIG_PIC32MX_CN - Input Change Interrupt + CONFIG_PIC32MX_ADCPRIO - ADC1 Convert Done + CONFIG_PIC32MX_PMPPRIO - Parallel Master Port + CONFIG_PIC32MX_CM1PRIO - Comparator 1 + CONFIG_PIC32MX_CM2PRIO - Comparator 2 + CONFIG_PIC32MX_FSCMPRIO - Fail-Safe Clock Monitor + CONFIG_PIC32MX_RTCCPRIO - Real-Time Clock and Calendar + CONFIG_PIC32MX_DMA0PRIO - DMA Channel 0 + CONFIG_PIC32MX_DMA1PRIO - DMA Channel 1 + CONFIG_PIC32MX_DMA2PRIO - DMA Channel 2 + CONFIG_PIC32MX_DMA3PRIO - DMA Channel 3 + CONFIG_PIC32MX_FCEPRIO - Flash Control Event + CONFIG_PIC32MX_USBPRIO - USB + + PIC32MXx specific device driver settings + + CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the + console and ttys0 (default is the UART0). + CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_UARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_UARTn_2STOP - Two stop bits + + PIC32MXx USB Device Configuration + + PIC32MXx USB Host Configuration (the PIC32MX does not support USB Host) + +Configurations +============== + +Each PIC32MX configuration is maintained in a sudirectory and can be +selected as follow: + + cd tools + ./configure.sh mirtoo/<subdir> + cd - + . ./setenv.sh + +Where <subdir> is one of the following: + + ostest: + This configuration directory, performs a simple OS test using + apps/examples/ostest. diff --git a/nuttx/configs/mirtoo/include/board.h b/nuttx/configs/mirtoo/include/board.h new file mode 100644 index 0000000000..ba6b0482de --- /dev/null +++ b/nuttx/configs/mirtoo/include/board.h @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/mirtoo/include/board.h + * include/arch/board/board.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIRTOO_INCLUDE_BOARD_H +#define __CONFIGS_MIRTOO_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/* Clocking *****************************************************************/ +/* Crystal frequencies */ + +#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ +#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_IDIV 2 /* PLL input divider */ +#define BOARD_PLL_MULT 20 /* PLL multiplier */ +#define BOARD_PLL_ODIV 1 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 80000000 /* CPU clock (80MHz = 8MHz * 20 / 2) */ + +/* USB PLL configuration. + * USB_CLOCK = ((POSC_XTAL / IDIV) * 24) / 2 + */ + +#define BOARD_UPLL_IDIV 2 /* USB PLL divider (revisit) */ +#define BOARD_USB_CLOCK 48000000 /* USB clock (8MHz / 2) * 24 / 2) */ + +/* Peripheral clock is divided down from CPU clock. + * PBCLOCK = CPU_CLOCK / PBDIV + */ + +#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_ENABLE 0 /* Watchdog is disabled */ +#define BOARD_WD_PRESCALER 8 /* Watchdog pre-scaler */ + +/* LED definitions **********************************************************/ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIRTOO_INCLUDE_BOARD_H */ diff --git a/nuttx/configs/mirtoo/ostest/Make.defs b/nuttx/configs/mirtoo/ostest/Make.defs new file mode 100644 index 0000000000..1ea95a10bb --- /dev/null +++ b/nuttx/configs/mirtoo/ostest/Make.defs @@ -0,0 +1,160 @@ +############################################################################ +# configs/mirtoo/ostest/Make.defs +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config + +# Setup for the selected toolchain + +ifeq ($(CONFIG_PIC32MX_MICROCHIPW),y) + # Microchip toolchain under Windows + CROSSDEV = pic32- + WINTOOL = y + MAXOPTIMIZATION = -O2 + ARCHCPUFLAGS = -mprocessor=elf32pic32mx -mno-float -mlong32 -membedded-data + ARCHPICFLAGS = -fpic -membedded-pic + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_PIC32MX_MICROCHIPW_LITE),y) + # Microchip toolchain under Windows + CROSSDEV = pic32- + WINTOOL = y +# MAXOPTIMIZATION = -O2 + ARCHCPUFLAGS = -mprocessor=elf32pic32mx -mno-float -mlong32 -membedded-data + ARCHPICFLAGS = -fpic -membedded-pic + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_PIC32MX_MICROCHIPL),y) + # Microchip toolchain under Linux + CROSSDEV = pic32- + MAXOPTIMIZATION = -O2 + ARCHCPUFLAGS = -mprocessor=elf32pic32mx -mno-float -mlong32 -membedded-data + ARCHPICFLAGS = -fpic -membedded-pic + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_PIC32MX_MICROCHIPL_LITE),y) + # Microchip toolchain under Linux + CROSSDEV = pic32- +# MAXOPTIMIZATION = -O2 + ARCHCPUFLAGS = -mprocessor=elf32pic32mx -mno-float -mlong32 -membedded-data + ARCHPICFLAGS = -fpic -membedded-pic + LDFLAGS += -nostartfiles -nodefaultlibs +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/winlink.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps.sh + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ("${CONFIG_DEBUG_SYMBOLS}","y") + ARCHOPTIMIZATION = -g +else + ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow +ARCHWARNINGSXX = -Wall -Wshadow +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +define PREPROCESS + @echo "CPP: $1->$2" + @$(CPP) $(CPPFLAGS) $1 -o $2 +endef + +define COMPILE + @echo "CC: $1" + @$(CC) -c $(CFLAGS) $1 -o $2 +endef + +define COMPILEXX + @echo "CXX: $1" + @$(CXX) -c $(CXXFLAGS) $1 -o $2 +endef + +define ASSEMBLE + @echo "AS: $1" + @$(CC) -c $(AFLAGS) $1 -o $2 +endef + +define ARCHIVE + echo "AR: $2"; \ + $(AR) $1 $2 || { echo "$(AR) $1 $2 FAILED!" ; exit 1 ; } +endef + +define CLEAN + @rm -f *.o *.a +endef + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe +HOSTLDFLAGS = + diff --git a/nuttx/configs/mirtoo/ostest/appconfig b/nuttx/configs/mirtoo/ostest/appconfig new file mode 100644 index 0000000000..545e133d64 --- /dev/null +++ b/nuttx/configs/mirtoo/ostest/appconfig @@ -0,0 +1,39 @@ +############################################################################ +# configs/mirtoo/ostest/appconfig +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +# Path to example in apps/examples containing the user_start entry point + +CONFIGURED_APPS += examples/ostest + diff --git a/nuttx/configs/mirtoo/ostest/defconfig b/nuttx/configs/mirtoo/ostest/defconfig new file mode 100644 index 0000000000..51e2a4f581 --- /dev/null +++ b/nuttx/configs/mirtoo/ostest/defconfig @@ -0,0 +1,891 @@ +############################################################################ +# configs/mirtoo/ostest/defconfig +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ +# +# architecture selection +# +# CONFIG_ARCH - identifies the arch subdirectory and, hence, the +# processor architecture. +# CONFIG_ARCH_family - for use in C code. This identifies the +# particular chip family that the architecture is implemented +# in. +# CONFIG_ARCH_architecture - for use in C code. This identifies the +# specific architecture within the chip family. +# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory +# CONFIG_ARCH_CHIP_name - For use in C code +# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence, +# the board that supports the particular chip or SoC. +# CONFIG_ARCH_BOARD_name - for use in C code +# CONFIG_ENDIAN_BIG - define if big endian (default is little endian) +# NOTE: The PIC32MX is always little endian. +# CONFIG_BOARD_LOOPSPERMSEC - for delay loops +# CONFIG_DRAM_SIZE - Describes the installed DRAM. +# CONFIG_DRAM_START - The start address of DRAM (physical) +# CONFIG_DRAM_END - Last address+1 of installed RAM +# CONFIG_ARCH_NOINTC - define if the architecture does not +# support an interrupt controller or otherwise cannot support +# APIs like up_enable_irq() and up_disable_irq(). +# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided +# to interfaces like irq_attach() and irq_detach are the same as IRQ +# numbers that are provied to IRQ management functions like +# up_enable_irq() and up_disable_irq(). But that is not true for all +# interrupt controller implementations. For example, the PIC32MX +# interrupt controller manages interrupt sources that have a many-to-one +# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ +# must defined so that the OS logic will know not to assume it can use +# a vector number to enable or disable interrupts. +# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization +# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt +# stack. If defined, this symbol is the size of the interrupt +# stack in bytes. If not defined, the user task stacks will be +# used during interrupt handling. +# CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions +# CONFIG_ARCH_BOOTLOADER - Set if you are using a bootloader. +# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. +# CONFIG_ARCH_BUTTONS - Enable support for buttons. Unique to board architecture. +# CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that +# cause a 100 second delay during boot-up. This 100 second delay +# serves no purpose other than it allows you to calibrate +# CONFIG_BOARD_LOOPSPERMSEC. You simply use a stop watch to measure +# the 100 second delay then adjust CONFIG_BOARD_LOOPSPERMSEC until +# the delay actually is 100 seconds. +# CONFIG_ARCH_DMA - Support DMA initialization +# +CONFIG_ARCH=mips +CONFIG_ARCH_MIPS=y +CONFIG_ARCH_MIPS32=y +CONFIG_ARCH_CHIP=pic32mx +CONFIG_ARCH_CHIP_PIC32MX250F128D=y +CONFIG_ARCH_BOARD=mirtoo +CONFIG_ARCH_BOARD_MIRTOO=y +CONFIG_BOARD_LOOPSPERMSEC=8079 +CONFIG_DRAM_SIZE=(32*1024) +CONFIG_DRAM_START=0xa0000000 +CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) +CONFIG_ARCH_NOINTC=n +CONFIG_ARCH_VECNOTIRQ=y +CONFIG_ARCH_IRQPRIO=y +CONFIG_ARCH_INTERRUPTSTACK=n +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_BOOTLOADER=n +CONFIG_ARCH_LEDS=n +CONFIG_ARCH_BUTTONS=n +CONFIG_ARCH_CALIBRATION=n +CONFIG_ARCH_DMA=n + +# +# Enable support for RAM-based functions +# (If selected, then modifications are needed in ld.script as well) +# +CONFIG_PIC32MX_RAMFUNCS=n + +# +# Identify toolchain and linker options +# +CONFIG_PIC32MX_MICROCHIPW=n +CONFIG_PIC32MX_MICROCHIPL=n +CONFIG_PIC32MX_MICROCHIPW_LITE=y +CONFIG_PIC32MX_MICROCHIPL_LITE=n + +# +# Individual subsystems can be enabled: +# + +CONFIG_PIC32MX_WDT=n +CONFIG_PIC32MX_RTCC=n +CONFIG_PIC32MX_TIMER1=n +CONFIG_PIC32MX_TIMER2=n +CONFIG_PIC32MX_TIMER3=n +CONFIG_PIC32MX_TIMER4=n +CONFIG_PIC32MX_TIMER5=n +CONFIG_PIC32MX_IC1=n +CONFIG_PIC32MX_IC2=n +CONFIG_PIC32MX_IC3=n +CONFIG_PIC32MX_IC4=n +CONFIG_PIC32MX_IC5=n +CONFIG_PIC32MX_OC1=n +CONFIG_PIC32MX_OC2=n +CONFIG_PIC32MX_OC3=n +CONFIG_PIC32MX_OC4=n +CONFIG_PIC32MX_OC5=n +CONFIG_PIC32MX_I2C1=n +CONFIG_PIC32MX_I2C2=n +CONFIG_PIC32MX_SPI1=n +CONFIG_PIC32MX_SPI2=n +CONFIG_PIC32MX_UART1=y +CONFIG_PIC32MX_UART2=n +CONFIG_PIC32MX_PMP=n +CONFIG_PIC32MX_ADC=n +CONFIG_PIC32MX_CVR=n +CONFIG_PIC32MX_CM1=n +CONFIG_PIC32MX_CM2=n +CONFIG_PIC32MX_OSC=y +CONFIG_PIC32MX_DDP=n +CONFIG_PIC32MX_FLASH=n +CONFIG_PIC32MX_BMX=n +CONFIG_PIC32MX_DMA=n +CONFIG_PIC32MX_CHE=n +CONFIG_PIC32MX_USBDEV=n +CONFIG_PIC32MX_USBHOST=n +CONFIG_PIC32MX_IOPORTA=y +CONFIG_PIC32MX_IOPORTB=y +CONFIG_PIC32MX_IOPORTC=y +CONFIG_PIC32MX_IOPORTD=y +CONFIG_PIC32MX_IOPORTE=y +CONFIG_PIC32MX_IOPORTF=y +CONFIG_PIC32MX_IOPORTG=y + +# +# PIC32MX Configuration Settings +# +# DEVCFG0: +# CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The +# value 2 enables. +# CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select +# Default 1 (PG2) +# CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled) +# CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled) +# CONFIG_PIC32MX_CODEWP - Default 1 (disabled) +# DEVCFG1: (All settings determined by selections in board.h) +# DEVCFG2: (All settings determined by selections in board.h) +# DEVCFG3: +# CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled +# (USBID pin is controlled by the USB module), but 0 (GPIO) otherwise. +# CONFIG_PIC32MX_VBUSIO - USB VBUSON Selection (Default 1 if USB enabled +# (VBUSON pin is controlled by the USB module, but 0 (GPIO) otherwise. +# CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog +# can be enabled later by software). +# +CONFIG_PIC32MX_DEBUGGER=2 +CONFIG_PIC32MX_ICESEL=1 + +# +# PIC32MX specific serial device driver settings +# +# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the +# console and ttys0 (default is the UART1). +# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. +# This specific the size of the receive buffer +# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before +# being sent. This specific the size of the transmit buffer +# CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be +# CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. +# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity +# CONFIG_UARTn_2STOP - Two stop bits +# +CONFIG_UART1_SERIAL_CONSOLE=y +CONFIG_UART2_SERIAL_CONSOLE=n + +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART2_TXBUFSIZE=256 + +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART2_RXBUFSIZE=256 + +CONFIG_UART1_BAUD=115200 +CONFIG_UART2_BAUD=115200 + +CONFIG_UART1_BITS=8 +CONFIG_UART2_BITS=8 + +CONFIG_UART1_PARITY=0 +CONFIG_UART2_PARITY=0 + +CONFIG_UART1_2STOP=0 +CONFIG_UART2_2STOP=0 + +# +# General build options +# +# CONFIG_RRLOAD_BINARY - make the rrload binary format used with +# BSPs from www.ridgerun.com using the tools/mkimage.sh script +# CONFIG_INTELHEX_BINARY - make the Intel HEX binary format +# used with many different loaders using the GNU objcopy program +# Should not be selected if you are not using the GNU toolchain. +# CONFIG_MOTOROLA_SREC - make the Motorola S-Record binary format +# used with many different loaders using the GNU objcopy program +# Should not be selected if you are not using the GNU toolchain. +# CONFIG_RAW_BINARY - make a raw binary format file used with many +# different loaders using the GNU objcopy program. This option +# should not be selected if you are not using the GNU toolchain. +# CONFIG_HAVE_LIBM - toolchain supports libm.a +# +CONFIG_RRLOAD_BINARY=n +CONFIG_INTELHEX_BINARY=y +CONFIG_MOTOROLA_SREC=n +CONFIG_RAW_BINARY=n +CONFIG_HAVE_LIBM=n + +# +# General OS setup +# +# CONFIG_APPS_DIR - Identifies the relative path to the directory +# that builds the application to link with NuttX. Default: ../apps +# CONFIG_DEBUG - enables built-in debug options +# CONFIG_DEBUG_VERBOSE - enables verbose debug output +# CONFIG_DEBUG_SYMBOLS - build without optimization and with +# debug symbols (needed for use with a debugger). +# CONFIG_MM_REGIONS - If the architecture includes multiple +# regions of memory to allocate from, this specifies the +# number of memory regions that the memory manager must +# handle and enables the API mm_addregion(start, end); +# CONFIG_ARCH_LOWPUTC - architecture supports low-level, boot +# time console output +# CONFIG_MSEC_PER_TICK - The default system timer is 100Hz +# or MSEC_PER_TICK=10. This setting may be defined to +# inform NuttX that the processor hardware is providing +# system timer interrupts at some interrupt interval other +# than 10 msec. +# CONFIG_RR_INTERVAL - The round robin timeslice will be set +# this number of milliseconds; Round robin scheduling can +# be disabled by setting this value to zero. +# CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in +# scheduler to monitor system performance +# CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a +# task name to save in the TCB. Useful if scheduler +# instrumentation is selected. Set to zero to disable. +# CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY - +# Used to initialize the internal time logic. +# CONFIG_GREGORIAN_TIME - Enables Gregorian time conversions. +# You would only need this if you are concerned about accurate +# time conversions in the past or in the distant future. +# CONFIG_JULIAN_TIME - Enables Julian time conversions. You +# would only need this if you are concerned about accurate +# time conversion in the distand past. You must also define +# CONFIG_GREGORIAN_TIME in order to use Julian time. +# CONFIG_DEV_CONSOLE - Set if architecture-specific logic +# provides /dev/console. Enables stdout, stderr, stdin. +# CONFIG_DEV_LOWCONSOLE - Use the simple, low-level serial console +# driver (minimul support) +# CONFIG_MUTEX_TYPES: Set to enable support for recursive and +# errorcheck mutexes. Enables pthread_mutexattr_settype(). +# CONFIG_PRIORITY_INHERITANCE : Set to enable support for priority +# inheritance on mutexes and semaphores. +# CONFIG_SEM_PREALLOCHOLDERS: This setting is only used if priority +# inheritance is enabled. It defines the maximum number of +# different threads (minus one) that can take counts on a +# semaphore with priority inheritance support. This may be +# set to zero if priority inheritance is disabled OR if you +# are only using semaphores as mutexes (only one holder) OR +# if no more than two threads participate using a counting +# semaphore. +# CONFIG_SEM_NNESTPRIO. If priority inheritance is enabled, +# then this setting is the maximum number of higher priority +# threads (minus 1) than can be waiting for another thread +# to release a count on a semaphore. This value may be set +# to zero if no more than one thread is expected to wait for +# a semaphore. +# CONFIG_FDCLONE_DISABLE. Disable cloning of all file descriptors +# by task_create() when a new task is started. If set, all +# files/drivers will appear to be closed in the new task. +# CONFIG_FDCLONE_STDIO. Disable cloning of all but the first +# three file descriptors (stdin, stdout, stderr) by task_create() +# when a new task is started. If set, all files/drivers will +# appear to be closed in the new task except for stdin, stdout, +# and stderr. +# CONFIG_SDCLONE_DISABLE. Disable cloning of all socket +# desciptors by task_create() when a new task is started. If +# set, all sockets will appear to be closed in the new task. +# CONFIG_SCHED_WORKQUEUE. Create a dedicated "worker" thread to +# handle delayed processing from interrupt handlers. This feature +# is required for some drivers but, if there are not complaints, +# can be safely disabled. The worker thread also performs +# garbage collection -- completing any delayed memory deallocations +# from interrupt handlers. If the worker thread is disabled, +# then that clean will be performed by the IDLE thread instead +# (which runs at the lowest of priority and may not be appropriate +# if memory reclamation is of high priority). If CONFIG_SCHED_WORKQUEUE +# is enabled, then the following options can also be used: +# CONFIG_SCHED_WORKPRIORITY - The execution priority of the worker +# thread. Default: 50 +# CONFIG_SCHED_WORKPERIOD - How often the worker thread checks for +# work in units of microseconds. Default: 50*1000 (50 MS). +# CONFIG_SCHED_WORKSTACKSIZE - The stack size allocated for the worker +# thread. Default: CONFIG_IDLETHREAD_STACKSIZE. +# CONFIG_SIG_SIGWORK - The signal number that will be used to wake-up +# the worker thread. Default: 4 +# +#CONFIG_APPS_DIR= +CONFIG_DEBUG=n +CONFIG_DEBUG_VERBOSE=n +CONFIG_DEBUG_SYMBOLS=n +CONFIG_DEBUG_SCHED=n +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_LOWPUTC=y +CONFIG_RR_INTERVAL=0 +CONFIG_SCHED_INSTRUMENTATION=n +CONFIG_TASK_NAME_SIZE=0 +CONFIG_START_YEAR=2012 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=19 +CONFIG_GREGORIAN_TIME=n +CONFIG_JULIAN_TIME=n +CONFIG_DEV_CONSOLE=y +CONFIG_DEV_LOWCONSOLE=y +CONFIG_MUTEX_TYPES=n +CONFIG_PRIORITY_INHERITANCE=n +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SEM_NNESTPRIO=0 +CONFIG_FDCLONE_DISABLE=n +CONFIG_FDCLONE_STDIO=n +CONFIG_SDCLONE_DISABLE=y +CONFIG_SCHED_WORKQUEUE=n +CONFIG_SCHED_WORKPRIORITY=50 +CONFIG_SCHED_WORKPERIOD=(50*1000) +CONFIG_SCHED_WORKSTACKSIZE=1024 +CONFIG_SIG_SIGWORK=4 + +# +# Settings for nxflat +# CONFIG_NXFLAT. Enable support for the NXFLAT binary format. +# This format will support execution of NuttX binaries located +# in a ROMFS filesystem (see examples/nxflat). +# CONFIG_NXFLAT_DUMPBUFFER. Dump a most buffers that NXFFLAT deals +# with. CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and +# CONFIG_DEBUG_BINFMT have to be defined or +# CONFIG_NXFLAT_DUMPBUFFER does nothing. +# CONFIG_SYMTAB_ORDEREDBYNAME. Select if the system symbol table +# is ordered by symbol name +# +CONFIG_NXFLAT=n +CONFIG_NXFLAT_DUMPBUFFER=n +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# The following can be used to disable categories of +# APIs supported by the OS. If the compiler supports +# weak functions, then it should not be necessary to +# disable functions unless you want to restrict usage +# of those APIs. +# +# There are certain dependency relationships in these +# features. +# +# o mq_notify logic depends on signals to awaken tasks +# waiting for queues to become full or empty. +# o pthread_condtimedwait() depends on signals to wake +# up waiting tasks. +# +CONFIG_DISABLE_CLOCK=n +CONFIG_DISABLE_POSIX_TIMERS=n +CONFIG_DISABLE_PTHREAD=n +CONFIG_DISABLE_SIGNALS=n +CONFIG_DISABLE_MQUEUE=n +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_POLL=y + +# +# Misc libc settings +# +# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a +# little smaller if we do not support fieldwidthes +# +CONFIG_NOPRINTF_FIELDWIDTH=n + +# +# Allow for architecture optimized implementations +# +# The architecture can provide optimized versions of the +# following to improve system performance +# +CONFIG_ARCH_MEMCPY=n +CONFIG_ARCH_MEMCMP=n +CONFIG_ARCH_MEMMOVE=n +CONFIG_ARCH_MEMSET=n +CONFIG_ARCH_STRCMP=n +CONFIG_ARCH_STRCPY=n +CONFIG_ARCH_STRNCPY=n +CONFIG_ARCH_STRLEN=n +CONFIG_ARCH_STRNLEN=n +CONFIG_ARCH_BZERO=n + +# +# Sizes of configurable things (0 disables) +# +# CONFIG_MAX_TASKS - The maximum number of simultaneously +# active tasks. This value must be a power of two. +# CONFIG_MAX_TASK_ARGS - This controls the maximum number of +# of parameters that a task may receive (i.e., maxmum value +# of 'argc') +# CONFIG_NPTHREAD_KEYS - The number of items of thread- +# specific data that can be retained +# CONFIG_NFILE_DESCRIPTORS - The maximum number of file +# descriptors (one for each open) +# CONFIG_NFILE_STREAMS - The maximum number of streams that +# can be fopen'ed +# CONFIG_NAME_MAX - The maximum size of a file name. +# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate +# on fopen. (Only if CONFIG_NFILE_STREAMS > 0) +# CONFIG_NUNGET_CHARS - Number of characters that can be +# buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0) +# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message +# structures. The system manages a pool of preallocated +# message structures to minimize dynamic allocations +# CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with +# a fixed payload size given by this settin (does not include +# other message structure overhead. +# CONFIG_MAX_WDOGPARMS - Maximum number of parameters that +# can be passed to a watchdog handler +# CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog +# structures. The system manages a pool of preallocated +# watchdog structures to minimize dynamic allocations +# CONFIG_PREALLOC_TIMERS - The number of pre-allocated POSIX +# timer structures. The system manages a pool of preallocated +# timer structures to minimize dynamic allocations. Set to +# zero for all dynamic allocations. +# +CONFIG_MAX_TASKS=16 +CONFIG_MAX_TASK_ARGS=4 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_STDIO_BUFFER_SIZE=256 +CONFIG_NUNGET_CHARS=2 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Filesystem configuration +# +# CONFIG_FS_FAT - Enable FAT filesystem support +# CONFIG_FAT_SECTORSIZE - Max supported sector size +# CONFIG_FS_ROMFS - Enable ROMFS filesystem support +# +CONFIG_FS_FAT=n +CONFIG_FS_ROMFS=n + +# +# SPI-based MMC/SD driver +# +# CONFIG_MMCSD_NSLOTS +# Number of MMC/SD slots supported by the driver +# CONFIG_MMCSD_READONLY +# Provide read-only access (default is read/write) +# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card. +# Default is 20MHz. +# +CONFIG_MMCSD_NSLOTS=1 +CONFIG_MMCSD_READONLY=n +CONFIG_MMCSD_SPICLOCK=12500000 + +# +# Block driver buffering +# +# CONFIG_FS_READAHEAD +# Enable read-ahead buffering +# CONFIG_FS_WRITEBUFFER +# Enable write buffering +# +CONFIG_FS_READAHEAD=n +CONFIG_FS_WRITEBUFFER=n + +# +# SDIO-based MMC/SD driver +# +# CONFIG_SDIO_DMA +# SDIO driver supports DMA +# CONFIG_MMCSD_MMCSUPPORT +# Enable support for MMC cards +# CONFIG_MMCSD_HAVECARDDETECT +# SDIO driver card detection is 100% accurate +# +CONFIG_SDIO_DMA=n +CONFIG_MMCSD_MMCSUPPORT=n +CONFIG_MMCSD_HAVECARDDETECT=n + +# +# TCP/IP and UDP support via uIP +# CONFIG_NET - Enable or disable all network features +# CONFIG_NET_IPv6 - Build in support for IPv6 +# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread. +# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options +# CONFIG_NET_BUFSIZE - uIP buffer size +# CONFIG_NET_TCP - TCP support on or off +# CONFIG_NET_TCP_CONNS - Maximum number of TCP connections (all tasks) +# CONFIG_NET_TCP_READAHEAD_BUFSIZE - Size of TCP read-ahead buffers +# CONFIG_NET_NTCP_READAHEAD_BUFFERS - Number of TCP read-ahead buffers (may be zero) +# CONFIG_NET_TCPBACKLOG - Incoming connections pend in a backlog until +# accept() is called. The size of the backlog is selected when listen() is called. +# CONFIG_NET_MAX_LISTENPORTS - Maximum number of listening TCP ports (all tasks) +# CONFIG_NET_UDP - UDP support on or off +# CONFIG_NET_UDP_CHECKSUMS - UDP checksums on or off +# CONFIG_NET_UDP_CONNS - The maximum amount of concurrent UDP connections +# CONFIG_NET_ICMP - ICMP ping response support on or off +# CONFIG_NET_ICMP_PING - ICMP ping request support on or off +# CONFIG_NET_PINGADDRCONF - Use "ping" packet for setting IP address +# CONFIG_NET_STATISTICS - uIP statistics on or off +# CONFIG_NET_RECEIVE_WINDOW - The size of the advertised receiver's window +# CONFIG_NET_ARPTAB_SIZE - The size of the ARP table +# CONFIG_NET_BROADCAST - Broadcast support +# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates +# +CONFIG_NET=n +CONFIG_NET_IPv6=n +CONFIG_NSOCKET_DESCRIPTORS=0 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_BUFSIZE=420 +CONFIG_NET_TCP=n +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_UDP=n +CONFIG_NET_UDP_CHECKSUMS=y +#CONFIG_NET_UDP_CONNS=10 +CONFIG_NET_ICMP=n +CONFIG_NET_ICMP_PING=n +#CONFIG_NET_PINGADDRCONF=0 +CONFIG_NET_STATISTICS=y +#CONFIG_NET_RECEIVE_WINDOW= +#CONFIG_NET_ARPTAB_SIZE=8 +CONFIG_NET_BROADCAST=n +#CONFIG_NET_FWCACHE_SIZE=2 + +# +# UIP Network Utilities +# CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP +# CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries +# +CONFIG_NET_DHCP_LIGHT=n +CONFIG_NET_RESOLV_ENTRIES=4 + +# +# USB Device Configuration +# +# CONFIG_USBDEV +# Enables USB device support +# CONFIG_USBDEV_ISOCHRONOUS +# Build in extra support for isochronous endpoints +# CONFIG_USBDEV_DUALSPEED +# Hardware handles high and full speed operation (USB 2.0) +# CONFIG_USBDEV_SELFPOWERED +# Will cause USB features to indicate that the device is +# self-powered +# CONFIG_USBDEV_MAXPOWER +# Maximum power consumption in mA +# CONFIG_USBDEV_TRACE +# Enables USB tracing for debug +# CONFIG_USBDEV_TRACE_NRECORDS +# Number of trace entries to remember +# +CONFIG_USBDEV=n +CONFIG_USBDEV_ISOCHRONOUS=n +CONFIG_USBDEV_DUALSPEED=n +CONFIG_USBDEV_SELFPOWERED=y +CONFIG_USBDEV_REMOTEWAKEUP=n +CONFIG_USBDEV_MAXPOWER=100 +CONFIG_USBDEV_TRACE=n +CONFIG_USBDEV_TRACE_NRECORDS=128 + +# +# USB Serial Device Configuration +# +# CONFIG_PL2303 +# Enable compilation of the USB serial driver +# CONFIG_PL2303_EPINTIN +# The logical 7-bit address of a hardware endpoint that supports +# interrupt IN operation +# CONFIG_PL2303_EPBULKOUT +# The logical 7-bit address of a hardware endpoint that supports +# bulk OUT operation +# CONFIG_PL2303_EPBULKIN +# The logical 7-bit address of a hardware endpoint that supports +# bulk IN operation +# # CONFIG_PL2303_NWRREQS and CONFIG_PL2303_NRDREQS +# The number of write/read requests that can be in flight +# CONFIG_PL2303_VENDORID and CONFIG_PL2303_VENDORSTR +# The vendor ID code/string +# CONFIG_PL2303_PRODUCTID and CONFIG_PL2303_PRODUCTSTR +# The product ID code/string +# CONFIG_PL2303_RXBUFSIZE and CONFIG_PL2303_TXBUFSIZE +# Size of the serial receive/transmit buffers +# +CONFIG_PL2303=n +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=5 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="Nuttx" +CONFIG_PL2303_PRODUCTSTR="USBdev Serial" +CONFIG_PL2303_RXBUFSIZE=512 +CONFIG_PL2303_TXBUFSIZE=512 + +# +# USB Storage Device Configuration +# +# CONFIG_USBMSC +# Enable compilation of the USB storage driver +# CONFIG_USBMSC_EP0MAXPACKET +# Max packet size for endpoint 0 +# CONFIG_USBMSC_EPBULKOUT and CONFIG_USBMSC_EPBULKIN +# The logical 7-bit address of a hardware endpoints that support +# bulk OUT and IN operations +# CONFIG_USBMSC_NWRREQS and CONFIG_USBMSC_NRDREQS +# The number of write/read requests that can be in flight +# CONFIG_USBMSC_BULKINREQLEN and CONFIG_USBMSC_BULKOUTREQLEN +# The size of the buffer in each write/read request. This +# value needs to be at least as large as the endpoint +# maxpacket and ideally as large as a block device sector. +# CONFIG_USBMSC_VENDORID and CONFIG_USBMSC_VENDORSTR +# The vendor ID code/string +# CONFIG_USBMSC_PRODUCTID and CONFIG_USBMSC_PRODUCTSTR +# The product ID code/string +# CONFIG_USBMSC_REMOVABLE +# Select if the media is removable +# +CONFIG_USBMSC=n +CONFIG_USBMSC_EP0MAXPACKET=64 +CONFIG_USBMSC_EPBULKOUT=1 +CONFIG_USBMSC_EPBULKIN=2 +CONFIG_USBMSC_NRDREQS=8 +CONFIG_USBMSC_NWRREQS=2 +CONFIG_USBMSC_BULKINREQLEN=256 +CONFIG_USBMSC_BULKOUTREQLEN=64 +CONFIG_USBMSC_VENDORID=0x584e +CONFIG_USBMSC_VENDORSTR="NuttX" +CONFIG_USBMSC_PRODUCTID=0x5342 +CONFIG_USBMSC_PRODUCTSTR="USBdev Storage" +CONFIG_USBMSC_VERSIONNO=0x0399 +CONFIG_USBMSC_REMOVABLE=y + +# +# Settings for examples/uip +# +CONFIG_EXAMPLE_UIP_IPADDR=(10<<24|0<<16|0<<8|2) +CONFIG_EXAMPLE_UIP_DRIPADDR=(10<<24|0<<16|0<<8|1) +CONFIG_EXAMPLE_UIP_NETMASK=(255<<24|255<<16|255<<8|0) +CONFIG_EXAMPLE_UIP_DHCPC=n + +# +# Settings for examples/nettest +# +# CONFIG_EXAMPLE_NETTEST_SERVER - The target board can act +# as either the client side or server side of the test +# CONFIG_EXAMPLE_NETTEST_PERFORMANCE - If set, then the +# client side simply receives messages forever, allowing +# measurement of throughput +# CONFIG_EXAMPLE_NETTEST_NOMAC - Set if the hardware has +# no MAC address; one will be assigned +# CONFIG_EXAMPLE_NETTEST_IPADDR - Target board IP address +# CONFIG_EXAMPLE_NETTEST_DRIPADDR - Default router address +# CONFIG_EXAMPLE_NETTEST_NETMASK - Network mask +# CONFIG_EXAMPLE_NETTEST_CLIENTIP - IP address of the +# client side of the test (may be target or host) +# +CONFIG_EXAMPLE_NETTEST_SERVER=n +CONFIG_EXAMPLE_NETTEST_PERFORMANCE=n +CONFIG_EXAMPLE_NETTEST_NOMAC=y +CONFIG_EXAMPLE_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2) +CONFIG_EXAMPLE_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1) +CONFIG_EXAMPLE_NETTEST_NETMASK=(255<<24|255<<16|255<<8|0) +CONFIG_EXAMPLE_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1) + +# +# Settings for examples/ostest +# +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 + +# +# Settings for apps/nshlib +# +# CONFIG_NSH_FILEIOSIZE - Size of a static I/O buffer +# CONFIG_NSH_STRERROR - Use strerror(errno) +# CONFIG_NSH_LINELEN - Maximum length of one command line +# CONFIG_NSH_NESTDEPTH - Max number of nested if-then[-else]-fi +# CONFIG_NSH_DISABLESCRIPT - Disable scripting support +# CONFIG_NSH_DISABLEBG - Disable background commands +# CONFIG_NSH_ROMFSETC - Use startup script in /etc +# CONFIG_NSH_CONSOLE - Use serial console front end +# CONFIG_NSH_TELNET - Use telnetd console front end +# CONFIG_NSH_ARCHINIT - Platform provides architecture +# specific initialization (nsh_archinitialize()). +# +# If CONFIG_NSH_TELNET is selected: +# CONFIG_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size +# CONFIG_NSH_DHCPC - Obtain address using DHCP +# CONFIG_NSH_IPADDR - Provides static IP address +# CONFIG_NSH_DRIPADDR - Provides static router IP address +# CONFIG_NSH_NETMASK - Provides static network mask +# CONFIG_NSH_NOMAC - Use a bogus MAC address +# +# If CONFIG_NSH_ROMFSETC is selected: +# CONFIG_NSH_ROMFSMOUNTPT - ROMFS mountpoint +# CONFIG_NSH_INITSCRIPT - Relative path to init script +# CONFIG_NSH_ROMFSDEVNO - ROMFS RAM device minor +# CONFIG_NSH_ROMFSSECTSIZE - ROMF sector size +# CONFIG_NSH_FATDEVNO - FAT FS RAM device minor +# CONFIG_NSH_FATSECTSIZE - FAT FS sector size +# CONFIG_NSH_FATNSECTORS - FAT FS number of sectors +# CONFIG_NSH_FATMOUNTPT - FAT FS mountpoint +# +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=n +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLESCRIPT=n +CONFIG_NSH_DISABLEBG=n +CONFIG_NSH_ROMFSETC=n +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_TELNET=n +CONFIG_NSH_ARCHINIT=n +CONFIG_NSH_IOBUFFER_SIZE=512 +CONFIG_NSH_DHCPC=n +CONFIG_NSH_NOMAC=n +CONFIG_NSH_IPADDR=(10<<24|0<<16|0<<8|2) +CONFIG_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1) +CONFIG_NSH_NETMASK=(255<<24|255<<16|255<<8|0) +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=64 +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT=/tmp + +# +# Architecture-specific NSH options +# +CONFIG_NSH_MMCSDSPIPORTNO=1 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDMINOR=0 + +# +# Settings for examples/usbserial +# +# CONFIG_EXAMPLES_USBSERIAL_INONLY +# Only verify IN (device-to-host) data transfers. Default: both +# CONFIG_EXAMPLES_USBSERIAL_OUTONLY +# Only verify OUT (host-to-device) data transfers. Default: both +# CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL +# Send only small, single packet messages. Default: Send large and small. +# CONFIG_EXAMPLES_USBSERIAL_ONLYBIG +# Send only large, multi-packet messages. Default: Send large and small. +# +CONFIG_EXAMPLES_USBSERIAL_INONLY=n +CONFIG_EXAMPLES_USBSERIAL_OUTONLY=n +CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL=n +CONFIG_EXAMPLES_USBSERIAL_ONLYBIG=n + +CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n +CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n +CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n +CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n +CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n + +# +# Settings for examples/usbstorage +# +# CONFIG_EXAMPLES_USBMSC_NLUNS +# Defines the number of logical units (LUNs) exported by the USB storage +# driver. Each LUN corresponds to one exported block driver (or partition +# of a block driver). May be 1, 2, or 3. Default is 1. +# CONFIG_EXAMPLES_USBMSC_DEVMINOR1 +# The minor device number of the block driver for the first LUN. For +# example, N in /dev/mmcsdN. Used for registering the block driver. Default +# is zero. +# CONFIG_EXAMPLES_USBMSC_DEVPATH1 +# The full path to the registered block driver. Default is "/dev/mmcsd0" +# CONFIG_EXAMPLES_USBMSC_DEVMINOR2 and CONFIG_EXAMPLES_USBMSC_DEVPATH2 +# Similar parameters that would have to be provided if CONFIG_EXAMPLES_USBMSC_NLUNS +# is 2 or 3. No defaults. +# CONFIG_EXAMPLES_USBMSC_DEVMINOR3 and CONFIG_EXAMPLES_USBMSC_DEVPATH3 +# Similar parameters that would have to be provided if CONFIG_EXAMPLES_USBMSC_NLUNS +# is 3. No defaults. +# +# If CONFIG_USBDEV_TRACE is enabled (or CONFIG_DEBUG and CONFIG_DEBUG_USB), then +# the example code will also manage the USB trace output. The amount of trace output +# can be controlled using: +# +# CONFIG_EXAMPLES_USBMSC_TRACEINIT +# Show initialization events +# CONFIG_EXAMPLES_USBMSC_TRACECLASS +# Show class driver events +# CONFIG_EXAMPLES_USBMSC_TRACETRANSFERS +# Show data transfer events +# CONFIG_EXAMPLES_USBMSC_TRACECONTROLLER +# Show controller events +# CONFIG_EXAMPLES_USBMSC_TRACEINTERRUPTS +# Show interrupt-related events. +# +CONFIG_EXAMPLES_USBMSC_NLUNS=1 +CONFIG_EXAMPLES_USBMSC_DEVMINOR1=0 +CONFIG_EXAMPLES_USBMSC_DEVPATH1="/dev/mmcsd0" +CONFIG_EXAMPLES_USBMSC_TRACEINIT=n +CONFIG_EXAMPLES_USBMSC_TRACECLASS=n +CONFIG_EXAMPLES_USBMSC_TRACETRANSFERS=n +CONFIG_EXAMPLES_USBMSC_TRACECONTROLLER=n +CONFIG_EXAMPLES_USBMSC_TRACEINTERRUPTS=n + +# +# Stack and heap information +# +# CONFIG_BOOT_RUNFROMFLASH - Some configurations support XIP +# operation from FLASH but must copy initialized .data sections to RAM. +# (should also be =n for the PIC32MX which always runs from flash) +# CONFIG_BOOT_COPYTORAM - Some configurations boot in FLASH +# but copy themselves entirely into RAM for better performance. +# CONFIG_CUSTOM_STACK - The up_ implementation will handle +# all stack operations outside of the nuttx model. +# CONFIG_STACK_POINTER - The initial stack pointer (arm7tdmi only) +# CONFIG_IDLETHREAD_STACKSIZE - The size of the initial stack. +# This is the thread that (1) performs the inital boot of the system up +# to the point where user_start() is spawned, and (2) there after is the +# IDLE thread that executes only when there is no other thread ready to +# run. +# CONFIG_USERMAIN_STACKSIZE - The size of the stack to allocate +# for the main user thread that begins at the user_start() entry point. +# CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size +# CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size +# CONFIG_HEAP_BASE - The beginning of the heap +# CONFIG_HEAP_SIZE - The size of the heap +# +CONFIG_BOOT_RUNFROMFLASH=n +CONFIG_BOOT_COPYTORAM=n +CONFIG_CUSTOM_STACK=n +#CONFIG_STACK_POINTER +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_HEAP_BASE= +CONFIG_HEAP_SIZE= diff --git a/nuttx/configs/mirtoo/ostest/ld.script b/nuttx/configs/mirtoo/ostest/ld.script new file mode 100644 index 0000000000..35019a9e32 --- /dev/null +++ b/nuttx/configs/mirtoo/ostest/ld.script @@ -0,0 +1,315 @@ +/**************************************************************************** + * configs/mirtoo/ostest/ld.script + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MX250F128D has 128Kb of program FLASH at physical address + * 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K + + /* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses + * 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but + * all other accesses are in KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 (0.500Kb) + * TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb) + * Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb) + * Others 0x1fc00380 KSEG1 128 1024 (1.000Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb) + * JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb) + * Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb) + * DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16 + kseg1_devcfg (r) : ORIGIN = 0x1fc00bf0, LENGTH = 16 + + /* The PIC32MX250F128D has 32Kb of data memory at physical address + * 0x00000000. Since the PIC32MX has no data cache, this memory is + * always accessed through KSEG1. + * + * When used with MPLAB, we need to set aside 512 bytes of memory + * for use by MPLAB. + */ + + kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/nuttx/configs/mirtoo/ostest/setenv.sh b/nuttx/configs/mirtoo/ostest/setenv.sh new file mode 100755 index 0000000000..420af89329 --- /dev/null +++ b/nuttx/configs/mirtoo/ostest/setenv.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# configs/mirtoo/ostest/setenv.sh +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +# This the Cygwin path to the location where I installed the MicroChip +# PIC32MX toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install a different version of if you install +# the Linux PIC32MX toolchain as well +export TOOLCHAIN_BIN="/cygdrive/c/MicroChip/mplabc32/v1.12/bin" + +# This is the path to the toosl subdirectory +export PIC32TOOL_DIR="${WD}/configs/mirtoo/tools" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:${PIC32TOOL_DIR}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/nuttx/configs/mirtoo/src/Makefile b/nuttx/configs/mirtoo/src/Makefile new file mode 100644 index 0000000000..ed4a6e00ab --- /dev/null +++ b/nuttx/configs/mirtoo/src/Makefile @@ -0,0 +1,88 @@ +############################################################################ +# configs/mirtoo/src/Makefile +# +# Copyright (C) 2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +CFLAGS += -I$(TOPDIR)/sched + +ASRCS = +CSRCS = up_boot.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += up_leds.c +endif + +AOBJS = $(ASRCS:.S=$(OBJEXT)) +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src +ifeq ($(WINTOOL),y) + CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \ + -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \ + -I "${shell cygpath -w $(ARCH_SRCDIR)/mips32}" +else + CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/mips32 +endif + +all: libboard$(LIBEXT) + +$(AOBJS): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libboard$(LIBEXT): $(OBJS) + @( for obj in $(OBJS) ; do \ + $(call ARCHIVE, $@, $${obj}); \ + done ; ) + +.depend: Makefile $(SRCS) + @$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep + @touch $@ + +depend: .depend + +clean: + @rm -f libboard$(LIBEXT) *~ .*.swp + $(call CLEAN) + +distclean: clean + @rm -f Make.dep .depend + +-include Make.dep diff --git a/nuttx/configs/mirtoo/src/mirtoo-internal.h b/nuttx/configs/mirtoo/src/mirtoo-internal.h new file mode 100644 index 0000000000..69da95faff --- /dev/null +++ b/nuttx/configs/mirtoo/src/mirtoo-internal.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * configs/mirtoo/src/mirtoo-internal.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MIRTOO_SRC_MIRTOO_INTERNAL_H +#define __CONFIGS_MIRTOO_SRC_MIRTOO_INTERNAL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: pic32mx_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PCB Logic board. + * + ************************************************************************************/ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) +EXTERN void weak_function pic32mx_spiinitialize(void); +#endif + +/************************************************************************************ + * Name: pic32mx_ledinit + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +EXTERN void pic32mx_ledinit(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MIRTOO_SRC_MIRTOO_INTERNAL_H */ diff --git a/nuttx/configs/mirtoo/src/up_boot.c b/nuttx/configs/mirtoo/src/up_boot.c new file mode 100644 index 0000000000..6ad41cf618 --- /dev/null +++ b/nuttx/configs/mirtoo/src/up_boot.c @@ -0,0 +1,93 @@ +/************************************************************************************ + * configs/mirtoo/src/up_boot.c + * arch/mips/src/board/up_boot.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +#include <debug.h> + +#include <arch/board/board.h> + +#include "up_arch.h" +#include "up_internal.h" + +#include "pic32mx-internal.h" +#include "mirtoo-internal.h" + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: pic32mx_boardinitialize + * + * Description: + * All PIC32MX architectures must provide the following entry point. This entry + * point is called early in the intitialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void pic32mx_boardinitialize(void) +{ + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) the weak + * function pic32mx_spiinitialize() has been brought into the link. + */ + +#if defined(CONFIG_PIC32MX_SPI1) || defined(CONFIG_PIC32MX_SPI2) + if (pic32mx_spiinitialize) + { + pic32mx_spiinitialize(); + } +#endif + + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + pic32mx_ledinit(); +#endif +} diff --git a/nuttx/configs/mirtoo/tools/Makefile b/nuttx/configs/mirtoo/tools/Makefile new file mode 100644 index 0000000000..cd4bf50cb4 --- /dev/null +++ b/nuttx/configs/mirtoo/tools/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# configs/mirtoo/tools/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <gnutt@nuttx.org> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +all: mkpichex +default: mkpichex +.PHONY: clean + +# Add CFLAGS=-g on the make command line to build debug versions + +CFLAGS = -O2 -Wall -I. + +# mkpichex - Convert virtual addresses in nuttx.hex to physical addresses + +mkconfig: mkpichex.c mkpichex.c + @gcc $(CFLAGS) -o mkpichex mkpichex.c + +clean: + @rm -f *.o *.a *~ .*.swp + @rm -f mkpichex mkpichex.exe diff --git a/nuttx/configs/mirtoo/tools/mkpichex.c b/nuttx/configs/mirtoo/tools/mkpichex.c new file mode 100644 index 0000000000..379e6a72e3 --- /dev/null +++ b/nuttx/configs/mirtoo/tools/mkpichex.c @@ -0,0 +1,315 @@ +/**************************************************************************** + * configs/mirtoo/tools/mkpichex.c + * + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <stdio.h> +#include <string.h> +#include <stdlib.h> +#include <errno.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MAX_LINE 1024 + +/* Line offsets */ + +#define START_OFFSET 0 +#define LEN_OFFSET 1 +#define ADDR_OFFSET (LEN_OFFSET + 2) +#define TYPE_OFFSET (ADDR_OFFSET + 4) +#define PAYLOAD_OFFSET (TYPE_OFFSET + 2) +#define CHKSUM_OFFSET(n) (PAYLOAD_OFFSET+2*(n)) + +/* Record types: + * + * 00, data record, contains data and 16-bit address. The format described + * above. + * 01, End Of File record, a file termination record. No data. Has to be + * the last line of the file, only one per file permitted. Usually + * ':00000001FF'. Originally the End Of File record could contain a + * start address for the program being loaded, e.g. :00AB2F0125 + * would make a jump to address AB2F. This was convenient when programs + * were loaded from punched paper tape. + * 02, Extended Segment Address Record, segment-base address. Used when 16 + * bits are not enough, identical to 80x86 real mode addressing. The + * address specified by the 02 record is multiplied by 16 (shifted 4 + * bits left) and added to the subsequent 00 record addresses. This + * allows addressing of up to a megabyte of address space. The address + * field of this record has to be 0000, the byte count is 02 (the segment + * is 16-bit). The least significant hex digit of the segment address is + * always 0. + * 03, Start Segment Address Record. For 80x86 processors, it specifies the + * initial content of the CS:IP registers. The address field is 0000, the + * byte count is 04, the first two bytes are the CS value, the latter two + * are the IP value. + * 04, Extended Linear Address Record, allowing for fully 32 bit addressing. + * The address field is 0000, the byte count is 02. The two data bytes + * represent the upper 16 bits of the 32 bit address, when combined with + * the address of the 00 type record. + * 05, Start Linear Address Record. The address field is 0000, the byte + * count is 04. The 4 data bytes represent the 32-bit value loaded into + * the EIP register of the 80386 and higher CPU. + */ + +#define TYPE_DATA 0 +#define TYPE_EOF 1 +#define TYPE_EXTSEG 2 +#define TYPE_STARTSEG 3 +#define TYPE_EXTLIN 4 +#define TYPE_STARTLIN 5 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct hex_s +{ + unsigned char len; /* Length of the data payload */ + unsigned char type; /* Record type */ + unsigned short addr; /* Lower 16-bit address */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static char line[MAX_LINE+1]; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline char *getfilepath(const char *path, const char *name, const char *extension) +{ + snprintf(line, MAX_LINE, "%s/%s.%s", path, name, extension); + line[MAX_LINE] = '\0'; + return strdup(line); +} + +static void show_usage(const char *progname) +{ + fprintf(stderr, "USAGE: %s <abs path to nuttx.hex>\n", progname); + exit(1); +} + +static unsigned char get4(char hex) +{ + if (hex >= '0' && hex <= '9') + { + return hex - '0'; + } + else if (hex >= 'a' && hex <= 'f') + { + return hex - 'a' + 10; + } + else if (hex >= 'A' && hex <= 'F') + { + return hex - 'A' + 10; + } + + fprintf(stderr, "Bad hex character code: %s\n", line); + exit(2); +} + +static unsigned char get8(const char *ptr) +{ + return get4(ptr[0]) << 4 | get4(ptr[1]); +} + +static unsigned short get16(const char *ptr) +{ + return (unsigned short)get8(&ptr[0]) << 8 | (unsigned short)get8(&ptr[2]); +} + +static int parse_line(struct hex_s *hexline) +{ + /* :LLAAAATT... */ + + if (line[START_OFFSET] != ':') + { + fprintf(stderr, "Bad start code: %s\n", line); + return 1; + } + + hexline->len = get8(&line[LEN_OFFSET]); + hexline->addr = get16(&line[ADDR_OFFSET]); + hexline->type = get8(&line[TYPE_OFFSET]); + return 0; +} + +#if 0 +static unsigned char checksum(chksum_ndx) +{ + int chksum = 0; + int ndx; + + for (ndx = 1; ndx < chksum_ndx; ndx += 2) + { + chksum += (int)get8(&line[ndx]); + } + return (unsigned char)((-chksum) & 0xff); +} +#endif + +static void adjust_extlin(struct hex_s *hexline) +{ + unsigned short segment; + int chksum; + + /* Make sure that the payload is exactly 2 bytes */ + + if (hexline->len != 2) + { + fprintf(stderr, "Bad length on extended segment address record\n"); + fprintf(stderr, " %s", line); + } + + /* And the address field is supposed to be zero */ + + if (hexline->addr != 0) + { + fprintf(stderr, "Bad address on extended segment address record\n"); + fprintf(stderr, " %s", line); + } + + /* Decode the 2 byte payload */ + + segment = get16(&line[PAYLOAD_OFFSET]); + + /* Convert the address to a 29-bit physical address */ + + segment &= 0x1fff; + + /* Recalculate the checksum and make sure that there is a null terminator + * Since len=2, addr=0, type=4, the is a trivial calculation. + */ + + chksum = (-(segment + (segment >> 8) + 6)) & 0xff; + + /* Then create the new output record */ + + snprintf(line, MAX_LINE-PAYLOAD_OFFSET, ":02000004%04X%02X\n", segment, chksum); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int main(int argc, char **argv, char **envp) +{ + struct hex_s hexline; + char *srcfile; + char *destfile; + FILE *src; + FILE *dest; + + if (argc != 2) + { + fprintf(stderr, "Unexpected number of arguments\n"); + show_usage(argv[0]); + } + + srcfile = getfilepath(argv[1], "nuttx", "hex"); + if (!srcfile) + { + fprintf(stderr, "getfilepath failed\n"); + exit(2); + } + + destfile = getfilepath(argv[1], "nuttx", "tmp"); + if (!destfile) + { + fprintf(stderr, "getfilepath failed\n"); + exit(2); + } + + src = fopen(srcfile, "r"); + if (!src) + { + fprintf(stderr, "open %s failed: %s\n", srcfile, strerror(errno)); + exit(3); + } + + dest = fopen(destfile, "w"); + if (!dest) + { + fprintf(stderr, "open %s failed: %s\n", destfile, strerror(errno)); + exit(3); + } + + /* Read each line from the source file */ + + while (fgets(line, MAX_LINE, src) != NULL) + { + if (parse_line(&hexline)) + { + fprintf(stderr, "Failed to parse line\n"); + exit(1); + } + + /* Adjust 'Extended Segment Address Records'. */ + + if (hexline.type == TYPE_EXTLIN) + { + adjust_extlin(&hexline); + } + fputs(line, dest); + } + + fclose(src); + fclose(dest); + + /* Remove the original nuttx.hex file */ + + if (remove(srcfile) != 0) + { + fprintf(stderr, "Failed to remove the old '%s'\n", srcfile); + + } + + /* Rename the new nuttx.tmp file to nuttx.hex */ + + if (rename(destfile, srcfile) != 0) + { + fprintf(stderr, "Failed to rename '%s' to '%s'\n", destfile, srcfile); + } + + return 0; +} diff --git a/nuttx/configs/pcblogic-pic32mx/README.txt b/nuttx/configs/pcblogic-pic32mx/README.txt index 5fe88db5c8..7c109d60b0 100644 --- a/nuttx/configs/pcblogic-pic32mx/README.txt +++ b/nuttx/configs/pcblogic-pic32mx/README.txt @@ -310,7 +310,7 @@ PIC32MX Configuration Options CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_DRAM_START=0x10000000 + CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END - Last address+1 of installed RAM diff --git a/nuttx/configs/pic32-starterkit/README.txt b/nuttx/configs/pic32-starterkit/README.txt index 4a58862f3d..a6faed486f 100644 --- a/nuttx/configs/pic32-starterkit/README.txt +++ b/nuttx/configs/pic32-starterkit/README.txt @@ -757,7 +757,7 @@ PIC32MX Configuration Options CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_DRAM_START=0x10000000 + CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END - Last address+1 of installed RAM diff --git a/nuttx/configs/pic32mx7mmb/README.txt b/nuttx/configs/pic32mx7mmb/README.txt index e94c143b4a..949a5c31d4 100644 --- a/nuttx/configs/pic32mx7mmb/README.txt +++ b/nuttx/configs/pic32mx7mmb/README.txt @@ -335,7 +335,7 @@ PIC32MX Configuration Options CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_DRAM_START=0x10000000 + CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END - Last address+1 of installed RAM diff --git a/nuttx/configs/sure-pic32mx/README.txt b/nuttx/configs/sure-pic32mx/README.txt index c7ba540bb6..79ac313923 100644 --- a/nuttx/configs/sure-pic32mx/README.txt +++ b/nuttx/configs/sure-pic32mx/README.txt @@ -382,7 +382,7 @@ PIC32MX Configuration Options CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_DRAM_START=0x10000000 + CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END - Last address+1 of installed RAM diff --git a/nuttx/configs/ubw32/README.txt b/nuttx/configs/ubw32/README.txt index f5d1a27818..1d3362a513 100644 --- a/nuttx/configs/ubw32/README.txt +++ b/nuttx/configs/ubw32/README.txt @@ -354,7 +354,7 @@ PIC32MX Configuration Options CONFIG_DRAM_START - The start address of installed DRAM - CONFIG_DRAM_START=0x10000000 + CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END - Last address+1 of installed RAM |