Add board support for the FreeScale Kinetis TWR-K60N512

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3884 7fd9a85b-ad96-42d3-883c-3090e2eb8679

7 files changed, 210 insertions, 131 deletions

diff --git a/nuttx/configs/kwikstik-k40/README.txt b/nuttx/configs/kwikstik-k40/README.txt
index a520074605..e50c12df4a 100644
--- a/nuttx/configs/kwikstik-k40/README.txt
+++ b/nuttx/configs/kwikstik-k40/README.txt
@@ -99,7 +99,6 @@ Connections via the Tower Primary Connector Side A
 --- -------------------- --------------------------------
 PIN NAME                 USAGE
 --- -------------------- --------------------------------
-
 A9  GPIO9 / CTS1         PTE10/UART_CTS
 A43 RXD1                 PTE9/UART_RX
 A44 TXD1                 PTE8/UART_TX
diff --git a/nuttx/configs/kwikstik-k40/include/board.h b/nuttx/configs/kwikstik-k40/include/board.h
index cfd32b0fb6..e709ea5aff 100755
--- a/nuttx/configs/kwikstik-k40/include/board.h
+++ b/nuttx/configs/kwikstik-k40/include/board.h
@@ -69,7 +69,7 @@
 #define BOARD_VDIV           48             /* PLL VCO Divider (frequency multiplier) */
 
 #define BOARD_PLLIN_FREQ     (BOARD_EXTAL_FREQ / BOARD_PRDIV)
-#define BOARD_PLLOUT_FREQ    (BOARD_EXTAL_FREQ * BOARD_VDIV)
+#define BOARD_PLLOUT_FREQ    (BOARD_PLLIN_FREQ * BOARD_VDIV)
 #define BOARD_MCG_FREQ       BOARD_PLLOUT_FREQ
 
 /* SIM CLKDIV1 dividers */
@@ -85,6 +85,7 @@
 #define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
 
 /* LED definitions ******************************************************************/
+/* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
 
 #define LED_STARTED       0
 #define LED_HEAPALLOCATE  1
@@ -96,7 +97,7 @@
 #define LED_PANIC         7
 
 /* Button definitions ***************************************************************/
-
+/* The KwikStik-K40 board has no standard GPIO contact buttons */
 
 /* Alternative pin resolution *******************************************************/
 /* If there are alternative configurations for various pins in the
@@ -105,15 +106,107 @@
  * configuration for the board by defining a pin configuration (with no suffix) that
  * maps to the correct alternative.
  */
-#warning "Revisit:  This only only here to get a clean compiliation"
-#define PIN_UART0_RX PIN_UART0_RX_1
-#define PIN_UART0_TX PIN_UART0_TX_1
-#define PIN_UART1_RX PIN_UART1_RX_1
-#define PIN_UART1_TX PIN_UART1_TX_1
-#define PIN_UART3_RX PIN_UART3_RX_1
-#define PIN_UART3_TX PIN_UART3_TX_1
-#define PIN_UART4_RX PIN_UART4_RX_1
-#define PIN_UART4_TX PIN_UART4_TX_1
+
+/* On-Board Connections
+ *
+ * ------------------- -------------------------- -------- -------------------
+ * FEATURE             CONNECTION                 PORT/PIN PIN FUNCTION
+ * ------------------- -------------------------- -------- -------------------
+ * Audio Jack Output   Audio Amp On               PTE28    PTE28
+ *                     Audio Output               DAC1_OUT DAC1_OUT
+ *                     Volume Up                  PTD10    PTD10
+ *                     Volume Down                PTD11    PTD11
+ * Buzzer              Audio Out                  PTA8     FTM1_CH0
+ * Microphone          Microphone input           PTA7     ADC0_SE10
+ * SD Card Slot        SD Clock                   PTE2     SDHC0_DCLK
+ *                     SD Command                 PTE3     SDHC0_CMD
+ *                     SD Data0                   PTD12    SDHC0_D4
+ *                     SD Data1                   PTD13    SDHC0_D5
+ *                     SD Data2                   PTD14    SDHC0_D6
+ *                     SD Data3                   PTD15    SDHC0_D7
+ *                     SD Card Detect             PTE27    PTE27
+ *                     SD Card On                 PTE6     PTE6
+ * Infrared Port       IR Transmit                PTE4     IR_TX
+ *                     IR Receive                 PTA13    CMP2_IN0
+ * Touch Pads          E1 / Touch                 PTB0     TSI0_CH0
+ *                     E2 / Touch                 PTA4     TSI0_CH5
+ *                     E3 / Touch                 PTA24    PTA24
+ *                     E4 / Touch                 PTA25    PTA25
+ *                     E5 / Touch                 PTA26    PTA26
+ *                     E6 / Touch                 PTA27    PTA27
+ */
+
+#define PIN_FTM1_CH0   PIN_FTM1_CH0_1
+
+/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket
+ * ------------------- -------------------------- -------- -------------------
+ * FEATURE             CONNECTION                 PORT/PIN PIN FUNCTION
+ * ------------------- -------------------------- -------- -------------------
+ * General Purpose     TWRPI AN0 (J8 Pin 8)       ?        ADC0_DP0/ADC1_DP3
+ * TWRPI Socket        TWRPI AN1 (J8 Pin 9)       ?        ADC0_DM0/ADC1_DM3
+ *                     TWRPI AN2 (J8 Pin 12)      ?        ADC1_DP0/ADC0_DP3
+ *                     TWRPI ID0 (J8 Pin 17)      ?        ADC0_DP1
+ *                     TWRPI ID1 (J8 Pin 18)      ?        ADC0_DM1
+ *                     TWRPI I2C SCL (J9 Pin 3)   PTC10    I2C1_SCL
+ *                     TWRPI I2C SDA (J9 Pin 4)   PTC11    I2C1_SDA
+ *                     TWRPI SPI MISO (J9 Pin 9)  PTB23    SPI2_SIN
+ *                     TWRPI SPI MOSI (J9 Pin 10) PTB22    SPI2_SOUT
+ *                     TWRPI SPI SS (J9 Pin 11)   PTB20    SPI2_PCS0
+ *                     TWRPI SPI CLK (J9 Pin 12)  PTB21    SPI2_SCK
+ *                     TWRPI GPIO0 (J9 Pin 15)    PTC12    PTC12
+ *                     TWRPI GPIO1 (J9 Pin 16)    PTB9     PTB9
+ *                     TWRPI GPIO2 (J9 Pin 17)    PTB10    PTB10
+ *                     TWRPI GPIO3 (J9 Pin 18)    PTC5     PTC5
+ *                     TWRPI GPIO4 (J9 Pin 19)    PTA5     PTA5
+ */
+
+#define PIN_I2C1_SCL   PIN_I2C1_SCL_1
+#define PIN_I2C1_SDA   PIN_I2C1_SDA_1
+#define PIN_SPI2_SIN   PIN_SPI2_SIN_1
+#define PIN_SPI2_SOUT  PIN_SPI2_SOUT_1
+#define PIN_SPI2_PCS0  PIN_SPI2_PCS0_1
+#define PIN_SPI2_SCK   PIN_SPI2_SCK_1
+
+/* Connections via the Tower Primary Connector Side A
+ * --- -------------------- --------------------------------
+ * PIN NAME                 USAGE
+ * --- -------------------- --------------------------------
+ * A9  GPIO9 / CTS1         PTE10/UART_CTS
+ * A43 RXD1                 PTE9/UART_RX
+ * A44 TXD1                 PTE8/UART_TX
+ * A63 RSTOUT_b             PTA9/FTM1_CH1
+ */
+
+#define PIN_UART5_CTS   PIN_UART5_CTS_2
+#define PIN_FTM1_CH1    PIN_FTM1_CH1_1
+
+/* Connections via the Tower Primary Connector Side B
+ * --- -------------------- --------------------------------
+ * PIN NAME                 USAGE
+ * --- -------------------- --------------------------------
+ * B21 GPIO1 / RTS1         PTE7/UART_RTS
+ * B37 PWM7                 PTA8/FTM1_CH0
+ * B38 PWM6                 PTA9/FTM1_CH1
+ * B41 CANRX0               PTE25/CAN1_RX
+ * B42 CANTX0               PTE24/CAN1_TX
+ * B44 SPI0_MISO            PTA17/SPI0_SIN
+ * B45 SPI0_MOSI            PTA16/SPI0_SOUT
+ * B46 SPI0_CS0_b           PTA14/SPI0_PCS0
+ * B48 SPI0_CLK             PTA15/SPI0_SCK
+ * B50 SCL1                 PTE1/I2C1_SCL
+ * B51 SDA1                 PTE0/I2C1_SDA
+ * B52 GPIO5 / SD_CARD_DET  PTA16
+ */
+
+#define PIN_UART3_RTS   PIN_UART3_RTS_3
+#define PIN_CAN1_RX     PIN_CAN1_RX_2
+#define PIN_CAN1_TX     PIN_CAN1_TX_2
+#define PIN_SPI0_SIN    PIN_SPI0_SIN_1
+#define PIN_SPI0_SOUT   PIN_SPI0_SOUT_1
+#define PIN_SPI0_SCK    PIN_SPI0_SCK_1
+#define PIN_SPI0_PCS0   PIN_SPI0_PCS0_1
+#define PIN_I2C1_SCL    PIN_I2C1_SCL_2
+#define PIN_I2C1_SDA    PIN_I2C1_SDA_2
 
 /************************************************************************************
  * Public Data
@@ -144,37 +237,6 @@ extern "C" {
 
 EXTERN void kinetis_boardinitialize(void);
 
-/************************************************************************************
- * Button support.
- *
- * Description:
- *   up_buttoninit() must be called to initialize button resources.  After
- *   that, up_buttons() may be called to collect the current state of all
- *   buttons or up_irqbutton() may be called to register button interrupt
- *   handlers.
- *
- *   After up_buttoninit() has been called, up_buttons() may be called to
- *   collect the state of all buttons.  up_buttons() returns an 8-bit bit set
- *   with each bit associated with a button.  See the BUTTON_*_BIT and JOYSTICK_*_BIT
- *   definitions in board.h for the meaning of each bit.
- *
- *   up_irqbutton() may be called to register an interrupt handler that will
- *   be called when a button is depressed or released.  The ID value is a
- *   button enumeration value that uniquely identifies a button resource. See the
- *   BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
- *   value.  The previous interrupt handler address is returned (so that it may
- *   restored, if so desired).
- *
- ************************************************************************************/
-
-#ifdef CONFIG_ARCH_BUTTONS
-EXTERN void up_buttoninit(void);
-EXTERN uint8_t up_buttons(void);
-#ifdef CONFIG_ARCH_IRQBUTTONS
-EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
-#endif
-#endif
-
 #undef EXTERN
 #if defined(__cplusplus)
 }
diff --git a/nuttx/configs/kwikstik-k40/ostest/defconfig b/nuttx/configs/kwikstik-k40/ostest/defconfig
index e901f0ae94..2015535fcc 100755
--- a/nuttx/configs/kwikstik-k40/ostest/defconfig
+++ b/nuttx/configs/kwikstik-k40/ostest/defconfig
@@ -41,8 +41,8 @@
 #   particular chip family that the architecture is implemented
 #   in.
 # CONFIG_ARCH_architecture - for use in C code.  This identifies the
-#   specific architecture within the chip familyl.
-# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+#   specific architecture within the chip family.
+# CONFIG_ARCH_CHIP - Identifies the arch/chip subdirectory
 # CONFIG_ARCH_CHIP_name - For use in C code
 # CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
 #   the board that supports the particular chip or SoC.
@@ -77,8 +77,15 @@ CONFIG_ARCH_CHIP_MK40X256VLQ100=y
 CONFIG_ARCH_BOARD=kwikstik-k40
 CONFIG_ARCH_BOARD_KWIKSTIK_K40=y
 CONFIG_BOARD_LOOPSPERMSEC=5483
-CONFIG_DRAM_SIZE=0x00010000
-CONFIG_DRAM_START=0x20000000
+CONFIG_DRAM_SIZE=0x18000000
+CONFIG_DRAM_START=0x00008000
+
+# define KINETIS_SRAML_BASE     0x18000000 /* –0x1fffffff SRAM_L: Lower SRAM
+
+#  define KINETIS_FLASH_SIZE      (256*1024) /* 256Kb */
+#  define KINETIS_FLEXMEM_SIZE    (256*1024) /* 256Kb */
+#  define KINETIS_SRAM_SIZE       (64*1024)  /* 32Kb */
+
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
@@ -149,12 +156,12 @@ CONFIG_KINETIS_DFU=y
 
 CONFIG_KINETIS_TRACE=n
 CONFIG_KINETIS_FLEXBUS=n
-CONFIG_KINETIS_UART0=y
-CONFIG_KINETIS_UART1=y
+CONFIG_KINETIS_UART0=n
+CONFIG_KINETIS_UART1=n
 CONFIG_KINETIS_UART2=n
 CONFIG_KINETIS_UART3=n
 CONFIG_KINETIS_UART4=n
-CONFIG_KINETIS_UART5=n
+CONFIG_KINETIS_UART5=y
 CONFIG_KINETIS_ETHERNET=n
 CONFIG_KINETIS_RNGB=n
 CONFIG_KINETIS_FLEXCAN0=n
@@ -222,12 +229,12 @@ CONFIG_KINETIS_PORTEINTS=n
 # CONFIG_UARTn_BITS - The number of bits.  Must be either 8 or 9.
 # CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
 #
+CONFIG_UART0_SERIAL_CONSOLE=n
 CONFIG_UART1_SERIAL_CONSOLE=n
-CONFIG_UART1_SERIAL_CONSOLE=y
 CONFIG_UART2_SERIAL_CONSOLE=n
 CONFIG_UART3_SERIAL_CONSOLE=n
 CONFIG_UART4_SERIAL_CONSOLE=n
-CONFIG_UART5_SERIAL_CONSOLE=n
+CONFIG_UART5_SERIAL_CONSOLE=y
 
 CONFIG_UART0_TXBUFSIZE=256
 CONFIG_UART1_TXBUFSIZE=256
diff --git a/nuttx/configs/kwikstik-k40/ostest/ld.script b/nuttx/configs/kwikstik-k40/ostest/ld.script
index 21a3f11fd3..edadb38a02 100755
--- a/nuttx/configs/kwikstik-k40/ostest/ld.script
+++ b/nuttx/configs/kwikstik-k40/ostest/ld.script
@@ -33,17 +33,14 @@
  *
  ****************************************************************************/
 
-/* The K40X256VLQ100 has 256Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of FlexMemory beginning at address 0x2000:0000.  When booting from FLASH,
- * FLASH memory is aliased to address 0x0000:0000 where the code expects to
- * begin execution by jumping to the entry point in the 0x0800:0000 address
- * range.
+/* The K40X256VLQ100 has 256Kb of FLASH beginning at address 0x0000:0000 and
+ * 32Kb of SRAM beginning at address 0x1800:0000.
  */
 
 MEMORY
 {
-    flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+    flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
+    sram (rwx) : ORIGIN = 0x18000000, LENGTH = 32K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/nuttx/configs/kwikstik-k40/src/kwikstik-internal.h b/nuttx/configs/kwikstik-k40/src/kwikstik-internal.h
index ce8d3dcae1..6b98a67890 100755
--- a/nuttx/configs/kwikstik-k40/src/kwikstik-internal.h
+++ b/nuttx/configs/kwikstik-k40/src/kwikstik-internal.h
@@ -2,7 +2,7 @@
  * configs/kwikstik-k40/src/kwikstik_internal.h
  * arch/arm/src/board/kwikstik_internal.n
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -62,14 +62,87 @@
 #endif
 
 /* KwikStik-K40 GPIOs ***************************************************************/
+/* On-Board Connections
+ *
+ * ------------------- -------------------------- -------- -------------------
+ * FEATURE             CONNECTION                 PORT/PIN PIN FUNCTION
+ * ------------------- -------------------------- -------- -------------------
+ * Audio Jack Output   Audio Amp On               PTE28    PTE28
+ *                     Audio Output               DAC1_OUT DAC1_OUT
+ *                     Volume Up                  PTD10    PTD10
+ *                     Volume Down                PTD11    PTD11
+ * Buzzer              Audio Out                  PTA8     FTM1_CH0
+ * Microphone          Microphone input           PTA7     ADC0_SE10
+ * SD Card Slot        SD Clock                   PTE2     SDHC0_DCLK
+ *                     SD Command                 PTE3     SDHC0_CMD
+ *                     SD Data0                   PTD12    SDHC0_D4
+ *                     SD Data1                   PTD13    SDHC0_D5
+ *                     SD Data2                   PTD14    SDHC0_D6
+ *                     SD Data3                   PTD15    SDHC0_D7
+ *                     SD Card Detect             PTE27    PTE27
+ *                     SD Card On                 PTE6     PTE6
+ * Infrared Port       IR Transmit                PTE4     IR_TX
+ *                     IR Receive                 PTA13    CMP2_IN0
+ * Touch Pads          E1 / Touch                 PTB0     TSI0_CH0
+ *                     E2 / Touch                 PTA4     TSI0_CH5
+ *                     E3 / Touch                 PTA24    PTA24
+ *                     E4 / Touch                 PTA25    PTA25
+ *                     E5 / Touch                 PTA26    PTA26
+ *                     E6 / Touch                 PTA27    PTA27
+ */
 
-/* LEDs */
-
-/* BUTTONS -- NOTE that some have EXTI interrupts configured */
+#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN27)
+#define GPIO_SD_CARDON     (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN6)
+
+/* Connections via the General Purpose Tower Plug-in (TWRPI) Socket
+ * ------------------- -------------------------- -------- -------------------
+ * FEATURE             CONNECTION                 PORT/PIN PIN FUNCTION
+ * ------------------- -------------------------- -------- -------------------
+ * General Purpose     TWRPI AN0 (J8 Pin 8)       ?        ADC0_DP0/ADC1_DP3
+ * TWRPI Socket        TWRPI AN1 (J8 Pin 9)       ?        ADC0_DM0/ADC1_DM3
+ *                     TWRPI AN2 (J8 Pin 12)      ?        ADC1_DP0/ADC0_DP3
+ *                     TWRPI ID0 (J8 Pin 17)      ?        ADC0_DP1
+ *                     TWRPI ID1 (J8 Pin 18)      ?        ADC0_DM1
+ *                     TWRPI I2C SCL (J9 Pin 3)   PTC10    I2C1_SCL
+ *                     TWRPI I2C SDA (J9 Pin 4)   PTC11    I2C1_SDA
+ *                     TWRPI SPI MISO (J9 Pin 9)  PTB23    SPI2_SIN
+ *                     TWRPI SPI MOSI (J9 Pin 10) PTB22    SPI2_SOUT
+ *                     TWRPI SPI SS (J9 Pin 11)   PTB20    SPI2_PCS0
+ *                     TWRPI SPI CLK (J9 Pin 12)  PTB21    SPI2_SCK
+ *                     TWRPI GPIO0 (J9 Pin 15)    PTC12    PTC12
+ *                     TWRPI GPIO1 (J9 Pin 16)    PTB9     PTB9
+ *                     TWRPI GPIO2 (J9 Pin 17)    PTB10    PTB10
+ *                     TWRPI GPIO3 (J9 Pin 18)    PTC5     PTC5
+ *                     TWRPI GPIO4 (J9 Pin 19)    PTA5     PTA5
+ */
 
-/* SPI FLASH chip select */
+/* Connections via the Tower Primary Connector Side A
+ * --- -------------------- --------------------------------
+ * PIN NAME                 USAGE
+ * --- -------------------- --------------------------------
+ * A9  GPIO9 / CTS1         PTE10/UART_CTS
+ * A43 RXD1                 PTE9/UART_RX
+ * A44 TXD1                 PTE8/UART_TX
+ * A63 RSTOUT_b             PTA9/FTM1_CH1
+ */
 
-/* USB Soft Connect Pullup */
+/* Connections via the Tower Primary Connector Side B
+ * --- -------------------- --------------------------------
+ * PIN NAME                 USAGE
+ * --- -------------------- --------------------------------
+ * B21 GPIO1 / RTS1         PTE7/UART_RTS
+ * B37 PWM7                 PTA8/FTM1_CH0
+ * B38 PWM6                 PTA9/FTM1_CH1
+ * B41 CANRX0               PTE25/CAN1_RX
+ * B42 CANTX0               PTE24/CAN1_TX
+ * B44 SPI0_MISO            PTA17/SPI0_SIN
+ * B45 SPI0_MOSI            PTA16/SPI0_SOUT
+ * B46 SPI0_CS0_b           PTA14/SPI0_PCS0
+ * B48 SPI0_CLK             PTA15/SPI0_SCK
+ * B50 SCL1                 PTE1/I2C1_SCL
+ * B51 SDA1                 PTE0/I2C1_SDA
+ * B52 GPIO5 / SD_CARD_DET  PTA16
+ */
 
 /************************************************************************************
  * Public Types
diff --git a/nuttx/configs/kwikstik-k40/src/up_buttons.c b/nuttx/configs/kwikstik-k40/src/up_buttons.c
index 8ba02f4a69..3c944c5087 100644
--- a/nuttx/configs/kwikstik-k40/src/up_buttons.c
+++ b/nuttx/configs/kwikstik-k40/src/up_buttons.c
@@ -53,16 +53,6 @@
 /****************************************************************************
  * Private Data
  ****************************************************************************/
-/* Pin configuration for each KwikStik-K40 button.  This array is indexed by
- * the BUTTON_* definitions in board.h
- */
-
-#if 0
-static const uint16_t g_buttons[NUM_BUTTONS] =
-{
-};
-#endif
-#warning "Missing logic"
 
 /****************************************************************************
  * Private Functions
@@ -85,18 +75,7 @@ static const uint16_t g_buttons[NUM_BUTTONS] =
 
 void up_buttoninit(void)
 {
-#if 0
-  int i;
-
-  /* Configure the GPIO pins as inputs. */
-
-  for (i = 0; i < NUM_BUTTONS; i++)
-    {
-      kinetis_configgpio(g_buttons[i]);
-    }
-#else
-#warning "Missing logic"
-#endif
+  /* The KwikStik-K40 board has no standard GPIO contact buttons */
 }
 
 /****************************************************************************
@@ -105,31 +84,9 @@ void up_buttoninit(void)
 
 uint8_t up_buttons(void)
 {
-#if 0
-  uint8_t ret = 0;
-  int i;
-
-  /* Check that state of each key */
+  /* The KwikStik-K40 board has no standard GPIO contact buttons */
 
-  for (i = 0; i < NUM_BUTTONS; i++)
-    {
-       /* A LOW value means that the key is pressed for most keys */
-
-       bool released = kinetis_gpioread(g_buttons[i]);
-
-       /* Accumulate the set of depressed (not released) keys */
-
-       if (!released)
-         {
-            ret |= (1 << i);
-         }
-    }
-
-  return ret;
-#else
-#warning "Missing logic"
   return 0;
-#endif
 }
 
 /************************************************************************************
@@ -158,15 +115,9 @@ uint8_t up_buttons(void)
 #ifdef CONFIG_ARCH_IRQBUTTONS
 xcpt_t up_irqbutton(int id, xcpt_t irqhandler)
 {
-  xcpt_t oldhandler = NULL;
-
-  /* The following should be atomic */
+  /* The KwikStik-K40 board has no standard GPIO contact buttons */
 
-  if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
-    {
-      oldhandler = kinetis_gpiosetevent(g_buttons[id], true, true, true, irqhandler);
-    }
-  return oldhandler;
+  return NULL;
 }
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
diff --git a/nuttx/configs/kwikstik-k40/src/up_leds.c b/nuttx/configs/kwikstik-k40/src/up_leds.c
index d15acf37ce..f86c77aef5 100755
--- a/nuttx/configs/kwikstik-k40/src/up_leds.c
+++ b/nuttx/configs/kwikstik-k40/src/up_leds.c
@@ -40,18 +40,8 @@
 
 #include <nuttx/config.h>
 
-#include <stdint.h>
-#include <stdbool.h>
 #include <debug.h>
 
-#include <arch/board/board.h>
-
-#include "chip.h"
-#include "up_arch.h"
-#include "up_internal.h"
-#include "kinetis_internal.h"
-#include "kwikstik-internal.h"
-
 /****************************************************************************
  * Definitions
  ****************************************************************************/
@@ -93,7 +83,7 @@
 #ifdef CONFIG_ARCH_LEDS
 void up_ledinit(void)
 {
-# warning "Missing logic"
+  /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
 }
 
 /****************************************************************************
@@ -102,7 +92,7 @@ void up_ledinit(void)
 
 void up_ledon(int led)
 {
-# warning "Missing logic"
+  /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
 }
 
 /****************************************************************************
@@ -111,7 +101,7 @@ void up_ledon(int led)
 
 void up_ledoff(int led)
 {
-# warning "Missing logic"
+  /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
 }
 
 #endif /* CONFIG_ARCH_LEDS */