STM32 Kconfig looks good. STM32 external ram configuration changed.

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5100 7fd9a85b-ad96-42d3-883c-3090e2eb8679

8 files changed, 76 insertions, 33 deletions

diff --git a/nuttx/arch/Kconfig b/nuttx/arch/Kconfig
index fea56b7392..90bc4da918 100644
--- a/nuttx/arch/Kconfig
+++ b/nuttx/arch/Kconfig
@@ -58,11 +58,13 @@ config ARCH_X86
 
 config ARCH_Z16
 	bool "ZNEO"
+	select ARCH_HAVE_HEAP2
 	---help---
 		ZiLOG ZNEO 16-bit architectures (z16f).
 
 config ARCH_Z80
 	bool "z80"
+	select ARCH_HAVE_HEAP2
 	---help---
 		ZiLOG 8-bit architectures (z80, ez80, z8).
 
diff --git a/nuttx/arch/arm/Kconfig b/nuttx/arch/arm/Kconfig
index e6b195aff6..2b06f354c5 100644
--- a/nuttx/arch/arm/Kconfig
+++ b/nuttx/arch/arm/Kconfig
@@ -17,6 +17,7 @@ config ARCH_CHIP_C5471
 config ARCH_CHIP_CALYPSO
 	bool "Calypso"
 	select ARCH_ARM7TDMI
+	select ARCH_HAVE_HEAP2
 	---help---
 		TI Calypso-based cell phones (ARM7TDMI)
 
@@ -29,6 +30,7 @@ config ARCH_CHIP_DM320
 config ARCH_CHIP_IMX
 	bool "Freescale iMX"
 	select ARCH_ARM920T
+	select ARCH_HAVE_HEAP2
 	---help---
 		Freescale iMX architectures (ARM920T)
 
diff --git a/nuttx/arch/arm/src/calypso/calypso_heap.c b/nuttx/arch/arm/src/calypso/calypso_heap.c
index b51596f90a..095fd1a5ad 100644
--- a/nuttx/arch/arm/src/calypso/calypso_heap.c
+++ b/nuttx/arch/arm/src/calypso/calypso_heap.c
@@ -37,6 +37,10 @@
  *
  ****************************************************************************/
 
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
 #include <nuttx/config.h>
 #include <nuttx/mm.h>
 
@@ -53,6 +57,14 @@
 #include "up_internal.h"
 
 /****************************************************************************
+ * Preprocessor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
  * Name: up_addregion
  *
  * Description:
@@ -84,7 +96,7 @@ void up_addregion(void)
   /* Configure the RHEA bridge with some sane default values */
   calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
 
-  mm_addregion((FAR void*)CONFIG_HEAP2_START, CONFIG_HEAP2_END-CONFIG_HEAP2_START);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 
 }
 #endif
diff --git a/nuttx/arch/arm/src/imx/imx_allocateheap.c b/nuttx/arch/arm/src/imx/imx_allocateheap.c
index 1574cac007..a42b2fb85e 100644
--- a/nuttx/arch/arm/src/imx/imx_allocateheap.c
+++ b/nuttx/arch/arm/src/imx/imx_allocateheap.c
@@ -111,8 +111,8 @@ void up_addregion(void)
 
   /* Check for any additional memory regions */
 
-#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+#if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_SIZE)
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 #endif
 }
 #endif
diff --git a/nuttx/arch/arm/src/stm32/Kconfig b/nuttx/arch/arm/src/stm32/Kconfig
index 442f7c659f..db785fd621 100644
--- a/nuttx/arch/arm/src/stm32/Kconfig
+++ b/nuttx/arch/arm/src/stm32/Kconfig
@@ -84,7 +84,42 @@ config STM32_STM32F20XX
 
 config STM32_STM32F40XX
 	bool
-	default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
+	default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IG
+
+choice
+	prompt "Toolchain Selection"
+	default STM32_CODESOURCERYW
+	depends on ARCH_CHIP_STM32
+
+config STM32_CODESOURCERYW
+	bool "CodeSourcery for Windows"
+
+config STM32_CODESOURCERYL
+	bool "CodeSourcery for Linux"
+
+config STM32_ATOLLIC_LITE
+	bool "Atollic Lite for Windows"
+
+config STM32_ATOLLIC_PRO
+	bool "Atollic Pro for Windows"
+
+config STM32_DEVKITARM
+	bool "DevkitARM (Windows)"
+
+config STM32_RAISONANCE
+	bool "STMicro Raisonance for Windows"
+
+config STM32_BUILDROOT
+	bool "NuttX buildroot (Cygwin or Linux)"
+
+endchoice
+
+config STM32_DFU
+	bool "DFU bootloader"
+	default n
+	---help---
+		Configure and position code for use with the STMicro DFU bootloader.  Do
+		not select this option if you will load code using JTAG/SWM.
 
 menu "STM32 Peripheral Support"
 
@@ -228,7 +263,7 @@ config STM32_SPI4
 
 config STM32_SYSCFG
 	bool "SYSCFG"
-	default n
+	default y
 	depends on STM32_STM32F20XX || STM32_STM32F40XX
 
 config STM32_TIM1
@@ -517,24 +552,11 @@ config STM32_CCMEXCLUDE
 config STM32_FSMC_SRAM
 	bool "External SRAM on FSMC"
 	default n
-	depends on FSMC
+	depends on STM32_FSMC
+	select ARCH_HAVE_HEAP2
 	---help---
 		In addition to internal SRAM, SRAM may also be available through the FSMC.
 
-config HEAP2_BASE
-	hex "FSMC SRAM base address"
-	default 0x00000000
-	depends on STM32_FSMC_SRAM
-	---help---
-		The base address of the SRAM in the FSMC address space.
-
-config HEAP2_END
-	hex "FSMC SRAM end+1 address"
-	default 0x00000000
-	depends on STM32_FSMC_SRAM
-	---help---
-		The end (+1) of the SRAM in the FSMC address space
-
 config STM32_TIM1_PWM
 	bool "TIM1 PWM"
 	default n
@@ -1536,6 +1558,7 @@ config STM32_PHYADDR
 config STM32_MII
 	bool "Use MII interface"
 	default n
+	depends on STM32_ETHMAC
 	---help---
 		Support Ethernet MII interface.
 
@@ -1549,13 +1572,14 @@ config STM32_MII_MCO2
 config STM32_AUTONEG
 	bool "Use autonegtiation"
 	default y
+	depends on STM32_ETHMAC
 	---help---
 		Use PHY autonegotion to determine speed and mode
 
 config STM32_ETHFD
 	bool "Full duplex"
 	default n
-	depends on !STM32_AUTONEG
+	depends on STM32_ETHMAC && !STM32_AUTONEG
 	---help---
 		If STM32_AUTONEG is not defined, then this may be defined to select full duplex
 		mode. Default: half-duplex
@@ -1563,7 +1587,7 @@ config STM32_ETHFD
 config STM32_ETH100MBPS
 	bool "100 Mbps"
 	default n
-	depends on !STM32_AUTONEG
+	depends on STM32_ETHMAC && !STM32_AUTONEG
 	---help---
 		If STM32_AUTONEG is not defined, then this may be defined to select 100 MBps
 		speed.  Default: 10 Mbps
@@ -1607,6 +1631,7 @@ config STM32_PHYSR_FULLDUPLEX
 config STM32_ETH_PTP
 	bool "Precision Time Protocol (PTP)"
 	default n
+	depends on STM32_ETHMAC
 	---help---
 		Precision Time Protocol (PTP).  Not supported but some hooks are indicated
 		with this condition.
@@ -1616,6 +1641,7 @@ endmenu
 config STM32_RMII
 	bool
 	default y if !STM32_MII
+	depends on STM32_ETHMAC
 
 config STM32_MII_MCO1
 	bool
diff --git a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
index 4c186a852b..8aa5622c8f 100644
--- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
@@ -73,13 +73,14 @@
  *
  * CONFIG_STM32_FSMC=y        : Enables the FSMC
  * CONFIG_STM32_FSMC_SRAM=y   : Indicates that SRAM is available via the
- *   FSMC (as opposed to an LCD or FLASH).
+ *                              FSMC (as opposed to an LCD or FLASH).
  * CONFIG_HEAP2_BASE          : The base address of the SRAM in the FSMC
- *   address space
- * CONFIG_HEAP2_END           : The end (+1) of the SRAM in the FSMC
- *   address space
+ *                              address space
+ * CONFIG_HEAP2_SIZE          : The size of the SRAM in the FSMC
+ *                              address space
  * CONFIG_MM_REGIONS          : Must be set to a large enough value to
- *   include the FSMC SRAM (as determined by the rules provided below)
+ *                              include the FSMC SRAM (as determined by
+ *                              the rules provided below)
  */
 
 #ifndef CONFIG_STM32_FSMC
@@ -256,12 +257,12 @@
 
 /* If FSMC SRAM is going to be used as heap, then verify that the starting
  * address and size of the external SRAM region has been provided in the
- * configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_END).
+ * configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE).
  */
 
 #ifdef CONFIG_STM32_FSMC_SRAM
-#  if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
-#    error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
+#  if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_SIZE)
+#    error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE must be provided"
 #    undef CONFIG_STM32_FSMC_SRAM
 #  endif
 #endif
@@ -317,7 +318,7 @@ void up_addregion(void)
    /* Add the external FSMC SRAM heap region. */
 
 #ifdef CONFIG_STM32_FSMC_SRAM
-   mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+   mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 #endif
 }
 #endif
diff --git a/nuttx/arch/z16/src/common/up_allocateheap.c b/nuttx/arch/z16/src/common/up_allocateheap.c
index 62d96e0b34..0b6c766d36 100644
--- a/nuttx/arch/z16/src/common/up_allocateheap.c
+++ b/nuttx/arch/z16/src/common/up_allocateheap.c
@@ -107,6 +107,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void)
 {
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 }
 #endif
diff --git a/nuttx/arch/z80/src/common/up_allocateheap.c b/nuttx/arch/z80/src/common/up_allocateheap.c
index cb2f555938..368785cf2c 100644
--- a/nuttx/arch/z80/src/common/up_allocateheap.c
+++ b/nuttx/arch/z80/src/common/up_allocateheap.c
@@ -109,6 +109,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 #if CONFIG_MM_REGIONS > 1
 void up_addregion(void)
 {
-  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
+  mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
 }
 #endif