Progress of LPC43xx build environment

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4904 7fd9a85b-ad96-42d3-883c-3090e2eb8679

7 files changed, 159 insertions, 84 deletions

diff --git a/nuttx/arch/arm/src/lpc43xx/Make.defs b/nuttx/arch/arm/src/lpc43xx/Make.defs
new file mode 100644
index 0000000000..d2a4eb7463
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc43xx/Make.defs
@@ -0,0 +1,61 @@
+############################################################################
+# arch/arm/src/lpc43xx/Make.defs
+#
+#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+HEAD_ASRC	= 
+
+CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
+CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c \
+		  up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
+		  up_initialize.c up_initialstate.c up_interruptcontext.c \
+		  up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
+		  up_releasepending.c up_releasestack.c up_reprioritizertr.c \
+		  up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
+		  up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
+
+ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
+CMN_ASRCS	+= up_exception.S
+CMN_CSRCS	+= up_vectors.c
+endif
+
+ifeq ($(CONFIG_DEBUG_STACK),y)
+CMN_CSRCS	+= up_checkstack.c
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+CMN_ASRCS	+= up_fpu.S
+endif
+
+CHIP_ASRCS	= 
+CHIP_CSRCS	= 
diff --git a/nuttx/arch/arm/src/lpc43xx/chip.h b/nuttx/arch/arm/src/lpc43xx/chip.h
index 5b09185827..35150d08c6 100644
--- a/nuttx/arch/arm/src/lpc43xx/chip.h
+++ b/nuttx/arch/arm/src/lpc43xx/chip.h
@@ -46,79 +46,93 @@
 
 #include <arch/lpc43xx/chip.h>
 
-/* Include the chip  memory map, pin configuration, and vector definition.  These
- * header files may or may not be shared between different chips.  That decisions
+/* For each chip supported in chip.h, the following are provided to customize the
+ * environment for the specific LPC43XX chip:
+ *
+ * Define ARMV7M_PERIPHERAL_INTERRUPTS - This is needed by common/up_vectors.c.  This
+ *   definition provides the number of "external" interrupt vectors supported by
+ *   the specific LPC43 chip.
+ *
+ *   For the Cortex-M3 core, this should always be equal to the value
+ *   LPC43M4_IRQ_NEXTINT defined in include/lpc43xx/irq.h.  For the Cortex-M0
+ *   core, this should always be equal to the value LPC43M0_IRQ_NEXTINT defined
+ *   in include/lpc43xx/irq.h (At present, only the Cortex-M4 core is supported)
+ *
+ * Include the chip-specific memory map header file, and
+ * Include the chip-specific pin configuration.
+ *
+ * These header files may or may not be shared between different chips.  That decisions
  * depends on the similarity of the chip peripheral.
  */
 
 #if defined(CONFIG_ARCH_CHIP_LPC4310FBD144)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4310fbd144_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4310FET100)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4310fet100_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4320FBD144)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4320fbd144_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4320FET100)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4320fet100_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4330fbd144_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4330FET100)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4330fet100_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4330FET180)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4330fet180_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4330FET256)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4330fet256_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4350fbd208_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4350FET180)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4350fet180_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4350FET256)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc4310203050_memorymap.h"
 #  include "chip/lpc4310203050_pinconfig.h"
-#  include "chip/lpc4350fet256_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4353fbd208_pinconfig.h"
-#  include "chip/lpc4353fbd208_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4353fet180_pinconfig.h"
-#  include "chip/lpc4353fet180_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4353fet256_pinconfig.h"
-#  include "chip/lpc4353fet256_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4357fet180_pinconfig.h"
-#  include "chip/lpc4357fet180_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4357fbd208_pinconfig.h"
-#  include "chip/lpc4357fbd208_vectors.h"
 #elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
+#  define  ARMV7M_PERIPHERAL_INTERRUPTS 53
 #  include "chip/lpc435357_memorymap.h"
 #  include "chip/lpc4357fet256_pinconfig.h"
-#  include "chip/lpc4357fet256_vectors.h"
 #else
 #  error "Unsupported LPC43xx chip"
 #endif
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h
index 49c0fea620..97117466b6 100644
--- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h
+++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h
@@ -45,51 +45,8 @@
 /****************************************************************************************************
  * Pre-processor Definitions
  ****************************************************************************************************/
-/* Indices */
-
-#deine LPC43_GPIO_PORT0             0
-#deine LPC43_GPIO_PORT1             1
-#deine LPC43_GPIO_PORT2             2
-#deine LPC43_GPIO_PORT3             3
-#deine LPC43_GPIO_PORT4             4
-#deine LPC43_GPIO_PORT5             5
-#deine LPC43_GPIO_PORT6             6
-#deine LPC43_GPIO_PORT7             7
-
-#deine LPC43_GPIO_PIN0              0
-#deine LPC43_GPIO_PIN1              1
-#deine LPC43_GPIO_PIN2              2
-#deine LPC43_GPIO_PIN3              3
-#deine LPC43_GPIO_PIN4              4
-#deine LPC43_GPIO_PIN5              5
-#deine LPC43_GPIO_PIN6              6
-#deine LPC43_GPIO_PIN7              7
-#deine LPC43_GPIO_PIN8              8
-#deine LPC43_GPIO_PIN9              9
-#deine LPC43_GPIO_PIN10             10
-#deine LPC43_GPIO_PIN11             11
-#deine LPC43_GPIO_PIN12             12
-#deine LPC43_GPIO_PIN13             13
-#deine LPC43_GPIO_PIN14             14
-#deine LPC43_GPIO_PIN15             15
-#deine LPC43_GPIO_PIN16             16
-#deine LPC43_GPIO_PIN17             17
-#deine LPC43_GPIO_PIN18             18
-#deine LPC43_GPIO_PIN19             19
-#deine LPC43_GPIO_PIN20             20
-#deine LPC43_GPIO_PIN21             21
-#deine LPC43_GPIO_PIN22             22
-#deine LPC43_GPIO_PIN23             23
-#deine LPC43_GPIO_PIN24             24
-#deine LPC43_GPIO_PIN25             25
-#deine LPC43_GPIO_PIN26             26
-#deine LPC43_GPIO_PIN27             27
-#deine LPC43_GPIO_PIN28             28
-#deine LPC43_GPIO_PIN29             29
-#deine LPC43_GPIO_PIN30             30
-#deine LPC43_GPIO_PIN31             31
-
-/* Register Offsets *********************************************************************************/
+
+ /* Register Offsets *********************************************************************************/
 
 /* Pin interrupt registers (relative to LPC43_GPIOINT_BASE) */
 
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h
index 59678c1142..64c6dc6f8a 100644
--- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h
+++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h
@@ -218,7 +218,7 @@
  *   PF_0 to PF_11
  */
                                                /* Bits 0-4: Same as common bit definitions */
-#define SCU_NDPIN_EHS                (1 << 5)  /* Bit 5:  EHS Select Slew rate.
+#define SCU_NDPIN_EHS                (1 << 5)  /* Bit 5:  EHS Select Slew rate */
                                                /* Bits 6-31: Same as common bit definitions */
 /* Pin configuration registers for high-speed pins
  *
@@ -240,7 +240,7 @@
  * P3_3 and pins CLK0 to CLK3
  */
                                                /* Bits 0-4: Same as common bit definitions */
-#define SCU_HSPIN_EHS                (1 << 5)  /* Bit 5:  EHS Select Slew rate.
+#define SCU_HSPIN_EHS                (1 << 5)  /* Bit 5:  EHS Select Slew rate */
                                                /* Bits 6-31: Same as common bit definitions */
 /* Pin configuration register for USB1 pins USB1_DP/USB1_DM */
 
@@ -324,7 +324,7 @@
 
 #define SCU_EMCDELAYCLK_SHIFT        (0)       /* Bits 0-15: EMC_CLKn SDRAM clock output delay */
 #define SCU_EMCDELAYCLK_MASK         (0xffff << SCU_EMCDELAYCLK_SHIFT)
-#  define SCU_EMCDELAYCLK(n(         ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */
+#  define SCU_EMCDELAYCLK(n)         ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */
                                                /* Bits 16-31:  Reserved */
 /* Pin interrupt select register 0 */
 
diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_config.h b/nuttx/arch/arm/src/lpc43xx/lpc43_config.h
index a71fec94a8..c969553cbc 100644
--- a/nuttx/arch/arm/src/lpc43xx/lpc43_config.h
+++ b/nuttx/arch/arm/src/lpc43xx/lpc43_config.h
@@ -45,6 +45,19 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+
+/* Required configuration settings */
+
+/* There are two version of the FPU support built into the most NuttX Cortex-M4 ports.
+ * The current LPC43xx port support only one of these options, the "Non-Lazy Floating
+ * Point Register Save".  As a consequence, CONFIG_ARMV7M_CMNVECTOR must be defined
+ * in *all* LPC43xx configuration files.
+ */
+
+#ifndef CONFIG_ARMV7M_CMNVECTOR
+#  error "CONFIG_ARMV7M_CMNVECTOR must be defined for the LPC43xx"
+#endif
+
 /* Are any UARTs enabled? */
 
 #undef HAVE_UART
diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_gpio.h b/nuttx/arch/arm/src/lpc43xx/lpc43_gpio.h
index b3aa0c5838..1ceb3f4f0c 100644
--- a/nuttx/arch/arm/src/lpc43xx/lpc43_gpio.h
+++ b/nuttx/arch/arm/src/lpc43xx/lpc43_gpio.h
@@ -41,6 +41,7 @@
  ********************************************************************************************/
 
 #include <nuttx/config.h>
+#include <nuttx/irq.h>
 
 /* Include the chip capabilities and GPIO definitions file */
 
@@ -61,7 +62,7 @@
  *             1111 1100 0000 0000
  *             5432 1098 7654 3210
  *             ---- ---- ---- ----
- * Normal:    .MM. .... PPPB BBBB
+ * Normal:    .MMV .... PPPB BBBB
  * Interrupt: .MMG GPII PPPB BBBB
  */
 
@@ -83,6 +84,17 @@
 #define GPIO_IS_INPUT(p)           ((p) & GPIO_MODE_MASK) == GPIO_MODE_OUTPUT)
 #define GPIO_IS_INTERRUPT(p)       ((p) & GPIO_MODE_MASK) == GPIO_MODE_INTERRUPT)
 
+/* Initial value (for GPIO outputs only)
+ *
+ * 1111 1100 0000 0000
+ * 5432 1098 7654 3210
+ * ---- ---- ---- ----
+ * ...V .... .... ....
+ */
+
+#define GPIO_VALUE_ONE             (1 << 12) /* Bit 12: 1=High */
+#define GPIO_VALUE_ZERO            (0)       /* Bit 12: 0=Low */
+
 /* Group Interrupt Selection (valid only for interrupt GPIO pins):
  *
  * 1111 1100 0000 0000
@@ -212,9 +224,17 @@
  * Public Data
  ********************************************************************************************/
 
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
 /* Base addresses for each GPIO block */
 
-extern const uint32_t g_gpiobase[NUM_GPIO_PORTS];
+EXTERN const uint32_t g_gpiobase[NUM_GPIO_PORTS];
 
 /********************************************************************************************
  * Public Functions
@@ -298,5 +318,6 @@ EXTERN int lpc43_dumpgpio(uint16_t gpiocfg, const char *msg);
 #if defined(__cplusplus)
 }
 #endif
+#endif /* __ASSEMBLY__ */
 
 #endif /* __ARCH_ARM_SRC_LPC43XX_GPIO_H */
diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_pinconfig.h b/nuttx/arch/arm/src/lpc43xx/lpc43_pinconfig.h
index 133a79676d..42ab5eb72d 100644
--- a/nuttx/arch/arm/src/lpc43xx/lpc43_pinconfig.h
+++ b/nuttx/arch/arm/src/lpc43xx/lpc43_pinconfig.h
@@ -84,16 +84,16 @@
  */
 
 #define PINCONF_FUNC_SHIFT            (16)       /* Bits 16-18: Alternate function number */
-#define PINCONF_FUNC_MASK             (7 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC(n)             (0 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC0               (1 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC1               (2 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC2               (3 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC3               (4 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC4               (5 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC5               (6 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC6               (7 << PINCONF_MODE_SHIFT)
-#  define PINCONF_FUNC7               (8 << PINCONF_MODE_SHIFT)
+#define PINCONF_FUNC_MASK             (7 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC(n)             (0 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC0               (1 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC1               (2 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC2               (3 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC3               (4 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC4               (5 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC5               (6 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC6               (7 << PINCONF_FUNC_SHIFT)
+#  define PINCONF_FUNC7               (8 << PINCONF_FUNC_SHIFT)
 
 /* Pull-up/down resisters.  These selections are available for all pins but may not
  * make sense for all pins.  NOTE: that both pull up and down is not precluded.
@@ -121,11 +121,11 @@
  */
 
 #define PINCONF_DRIVE_SHIFT           (12)       /* Bits 12-13 = Pin drive strength */
-#define PINCONF_DRIVE_MASK            (3 << PINCONF_MODE_SHIFT)
-#  define PINCONF_DRIVE_NORMAL        (0 << PINCONF_MODE_SHIFT)
-#  define PINCONF_DRIVE_MEDIUM        (1 << PINCONF_MODE_SHIFT)
-#  define PINCONF_DRIVE_HIGH          (2 << PINCONF_MODE_SHIFT)
-#  define PINCONF_DRIVE_ULTRA         (3 << PINCONF_MODE_SHIFT)
+#define PINCONF_DRIVE_MASK            (3 << PINCONF_DRIVE_SHIFT)
+#  define PINCONF_DRIVE_NORMAL        (0 << PINCONF_DRIVE_SHIFT)
+#  define PINCONF_DRIVE_MEDIUM        (1 << PINCONF_DRIVE_SHIFT)
+#  define PINCONF_DRIVE_HIGH          (2 << PINCONF_DRIVE_SHIFT)
+#  define PINCONF_DRIVE_ULTRA         (3 << PINCONF_DRIVE_SHIFT)
 
 /* Input buffer enable
  *
@@ -241,6 +241,14 @@
  * Public Data
  ********************************************************************************************/
 
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
 /********************************************************************************************
  * Public Functions
  ********************************************************************************************/
@@ -279,5 +287,6 @@ EXTERN int lpc43_dumppinconfig(uint32_t pinconf, const char *msg);
 #if defined(__cplusplus)
 }
 #endif
+#endif /* __ASSEMBLY__ */
 
 #endif /* __ARCH_ARM_SRC_LPC43XX_PINCONFIG_H */