diff options
author | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2010-08-24 02:03:45 +0000 |
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committer | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2010-08-24 02:03:45 +0000 |
commit | e39ba378a23242aab6795cdfd4d119680dd39e9b (patch) | |
tree | ae2f9cadbd8836df12b15f10422df02b8124233b /nuttx/arch/arm/src/dm320 | |
parent | c0c8ae298dda62718c35617ad30a14f9752e5c3b (diff) |
Fix heap/page table overlap; Switch to 1Kb pages
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2881 7fd9a85b-ad96-42d3-883c-3090e2eb8679
Diffstat (limited to 'nuttx/arch/arm/src/dm320')
-rw-r--r-- | nuttx/arch/arm/src/dm320/dm320_boot.c | 10 | ||||
-rw-r--r-- | nuttx/arch/arm/src/dm320/dm320_memorymap.h | 20 |
2 files changed, 15 insertions, 15 deletions
diff --git a/nuttx/arch/arm/src/dm320/dm320_boot.c b/nuttx/arch/arm/src/dm320/dm320_boot.c index be541d1c65..7757ddab15 100644 --- a/nuttx/arch/arm/src/dm320/dm320_boot.c +++ b/nuttx/arch/arm/src/dm320/dm320_boot.c @@ -173,19 +173,15 @@ static void up_vectormapping(void) while (vector_paddr < end_paddr) { - up_setlevel2coarseentry(PGTABLE_COARSE_BASE_VADDR, - vector_paddr, - vector_vaddr, - MMU_L2_VECTORFLAGS); + up_setlevel2coarseentry(PGTABLE_L2_BASE_VADDR, vector_paddr, vector_vaddr, + MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; } /* Now set the level 1 descriptor to refer to the level 2 coarse page table. */ - up_setlevel1entry(PGTABLE_COARSE_BASE_PADDR, - DM320_VECTOR_VCOARSE, - MMU_L1_VECTORFLAGS); + up_setlevel1entry(PGTABLE_L2_BASE_PADDR, DM320_VECTOR_VCOARSE, MMU_L1_VECTORFLAGS); } /************************************************************************************ diff --git a/nuttx/arch/arm/src/dm320/dm320_memorymap.h b/nuttx/arch/arm/src/dm320/dm320_memorymap.h index 1f1e49d437..e673bc1b62 100644 --- a/nuttx/arch/arm/src/dm320/dm320_memorymap.h +++ b/nuttx/arch/arm/src/dm320/dm320_memorymap.h @@ -42,6 +42,8 @@ #include <nuttx/config.h> +#include "arm.h" + /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ @@ -168,23 +170,25 @@ * page table for the virtual mappings. A portion of this table is * not accessible in the virtual address space (for normal operation). * We will reuse this memory for coarse page tables as follows: + * FIXME! Where does that 0x00000800 come from. I can't remember + * and it does not feel right! */ #define PGTABLE_BASE_PADDR DM320_SDRAM_PADDR #define PGTABLE_SDRAM_PADDR PGTABLE_BASE_PADDR -#define PGTABLE_COARSE_BASE_PADDR (PGTABLE_BASE_PADDR+0x00000800) -#define PGTABLE_COARSE_END_PADDR (PGTABLE_BASE_PADDR+0x00004000) -#define PGTABLE_END_PADDR (PGTABLE_BASE_PADDR+0x00004000) +#define PGTABLE_L2_BASE_PADDR (PGTABLE_BASE_PADDR+0x00000800) +#define PGTABLE_L2_END_PADDR (PGTABLE_BASE_PADDR+PGTABLE_SIZE) #define PGTABLE_BASE_VADDR DM320_SDRAM_VADDR #define PGTABLE_SDRAM_VADDR PGTABLE_BASE_VADDR -#define PGTABLE_COARSE_BASE_VADDR (PGTABLE_BASE_VADDR+0x00000800) -#define PGTABLE_COARSE_END_VADDR (PGTABLE_BASE_VADDR+0x00004000) -#define PGTABLE_END_VADDR (PGTABLE_BASE_VADDR+0x00004000) +#define PGTABLE_L2_BASE_VADDR (PGTABLE_BASE_VADDR+0x00000800) +#define PGTABLE_L2_END_VADDR (PGTABLE_BASE_VADDR+PGTABLE_SIZE) +#define PGTABLE_L2_ALLOC (PGTABLE_L2_END_VADDR-PGTABLE_L2_BASE_VADDR) #define PGTABLE_COARSE_TABLE_SIZE (4*256) -#define PGTABLE_COARSE_ALLOC (PGTABLE_COARSE_END_VADDR-PGTABLE_COARSE_BASE_VADDR) -#define PGTABLE_NCOARSE_TABLES (PGTABLE_COARSE_SIZE / PGTBALE_COARSE_TABLE_ALLOC) +#define PGTABLE_NCOARSE_TABLES (PGTABLE_L2_ALLOC / PGTABLE_COARSE_TABLE_SIZE) +#define PGTABLE_FINE_TABLE_SIZE (4*1024) +#define PGTABLE_NFINE_TABLES (PGTABLE_L2_ALLOC / PGTABLE_FINE_TABLE_SIZE) /* This is the base address of the interrupt vectors on the ARM926 */ |