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authorDenis 'GNUtoo' Carikli <GNUtoo@no-log.org>2015-04-05 23:24:42 +0200
committerDenis 'GNUtoo' Carikli <GNUtoo@no-log.org>2015-04-21 23:46:16 +0200
commita2ce02f9208a26fbca87a0e05479f9af1800e3c0 (patch)
tree90070037b2172feb0701d22f84a364a783b9af20 /apps/osmocomBB/osmocomBB/include/asm/assembler.h
parent55a5cab48f8c7694856296096ed2dec568e12ba7 (diff)
Import layer1 from osmocomBB (WIP: NOT COMPLETE)gnutoo/layer1-2015-wip
The goal is to touch the code as less as possible. The following files still had to be modified: * The Makefiles to integrate it into nuttx * The layer1's main.c was converted to command-line only: No more keyboard and GUI handling. TODO: * Finish importing the layer1 * See how to avoid duplication with misc/tools/osmocon/ headers * Makefile: use $(TOPDIR) if necessary instead of always using ../ ../ could be used some time only * Kconfig for -DCONFIG_* ? * GTA02 support Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Diffstat (limited to 'apps/osmocomBB/osmocomBB/include/asm/assembler.h')
-rw-r--r--apps/osmocomBB/osmocomBB/include/asm/assembler.h113
1 files changed, 113 insertions, 0 deletions
diff --git a/apps/osmocomBB/osmocomBB/include/asm/assembler.h b/apps/osmocomBB/osmocomBB/include/asm/assembler.h
new file mode 100644
index 0000000000..cd03e98d3f
--- /dev/null
+++ b/apps/osmocomBB/osmocomBB/include/asm/assembler.h
@@ -0,0 +1,113 @@
+/*
+ * linux/include/asm-arm/assembler.h
+ *
+ * Copyright (C) 1996-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains arm architecture specific defines
+ * for the different processors.
+ *
+ * Do not include any C declarations in this file - it is included by
+ * assembler source.
+ */
+#ifndef __ASSEMBLY__
+#error "Only include this from assembly code"
+#endif
+
+#include <asm/ptrace.h>
+
+/*
+ * Endian independent macros for shifting bytes within registers.
+ */
+#ifndef __ARMEB__
+#define pull lsr
+#define push lsl
+#define get_byte_0 lsl #0
+#define get_byte_1 lsr #8
+#define get_byte_2 lsr #16
+#define get_byte_3 lsr #24
+#define put_byte_0 lsl #0
+#define put_byte_1 lsl #8
+#define put_byte_2 lsl #16
+#define put_byte_3 lsl #24
+#else
+#define pull lsl
+#define push lsr
+#define get_byte_0 lsr #24
+#define get_byte_1 lsr #16
+#define get_byte_2 lsr #8
+#define get_byte_3 lsl #0
+#define put_byte_0 lsl #24
+#define put_byte_1 lsl #16
+#define put_byte_2 lsl #8
+#define put_byte_3 lsl #0
+#endif
+
+#define PLD(code...)
+
+#define MODE_USR USR_MODE
+#define MODE_FIQ FIQ_MODE
+#define MODE_IRQ IRQ_MODE
+#define MODE_SVC SVC_MODE
+
+#define DEFAULT_FIQ MODE_FIQ
+
+/*
+ * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
+ */
+#ifdef __STDC__
+#define LOADREGS(cond, base, reglist...)\
+ ldm##cond base,reglist
+#else
+#define LOADREGS(cond, base, reglist...)\
+ ldm/**/cond base,reglist
+#endif
+
+/*
+ * Build a return instruction for this processor type.
+ */
+#define RETINSTR(instr, regs...)\
+ instr regs
+
+/*
+ * Enable and disable interrupts
+ */
+ .macro disable_irq
+ msr cpsr_c, #PSR_I_BIT | SVC_MODE
+ .endm
+
+ .macro enable_irq
+ msr cpsr_c, #SVC_MODE
+ .endm
+
+/*
+ * Save the current IRQ state and disable IRQs. Note that this macro
+ * assumes FIQs are enabled, and that the processor is in SVC mode.
+ */
+ .macro save_and_disable_irqs, oldcpsr
+ mrs \oldcpsr, cpsr
+ disable_irq
+ .endm
+
+/*
+ * Restore interrupt state previously stored in a register. We don't
+ * guarantee that this will preserve the flags.
+ */
+ .macro restore_irqs, oldcpsr
+ msr cpsr_c, \oldcpsr
+ .endm
+
+/*
+ * These two are used to save LR/restore PC over a user-based access.
+ * The old 26-bit architecture requires that we do. On 32-bit
+ * architecture, we can safely ignore this requirement.
+ */
+ .macro save_lr
+ .endm
+
+ .macro restore_pc
+ mov pc, lr
+ .endm