Add more context switching files

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@3624 7fd9a85b-ad96-42d3-883c-3090e2eb8679

9 files changed, 613 insertions, 106 deletions

diff --git a/nuttx/arch/mips/include/mips32/irq.h b/nuttx/arch/mips/include/mips32/irq.h
index 8d1e2a0362..9db3ae26af 100755
--- a/nuttx/arch/mips/include/mips32/irq.h
+++ b/nuttx/arch/mips/include/mips32/irq.h
@@ -67,51 +67,52 @@
 #define REG_MFLO_NDX        0
 #define REG_MFHI_NDX        1
 #define REG_EPC_NDX         2
+#define REG_STATUS_NDX      3
 
 /* General pupose registers */
 /* $0: Zero register does not need to be saved */
 /* $1: at_reg, assembler temporary */
 
-#define REG_R1_NDX          3
+#define REG_R1_NDX          4
 
 /* $2-$3 = v0-v1: Return value registers */
 
-#define REG_R2_NDX          4
-#define REG_R3_NDX          5
+#define REG_R2_NDX          5
+#define REG_R3_NDX          6
 
 /* $4-$7 = a0-a3: Argument registers */
 
-#define REG_R4_NDX          6
-#define REG_R5_NDX          7
-#define REG_R6_NDX          8
-#define REG_R7_NDX          9
+#define REG_R4_NDX          7
+#define REG_R5_NDX          8
+#define REG_R6_NDX          9
+#define REG_R7_NDX          10
 
 /* $8-$15 = t0-t7: Volatile registers */
 
-#define REG_R8_NDX          10
-#define REG_R9_NDX          11
-#define REG_R10_NDX         12
-#define REG_R11_NDX         13
-#define REG_R12_NDX         14
-#define REG_R13_NDX         15
-#define REG_R14_NDX         16
-#define REG_R15_NDX         17
+#define REG_R8_NDX          11
+#define REG_R9_NDX          12
+#define REG_R10_NDX         13
+#define REG_R11_NDX         14
+#define REG_R12_NDX         15
+#define REG_R13_NDX         16
+#define REG_R14_NDX         17
+#define REG_R15_NDX         18
 
 /* $16-$23 = s0-s7: Static registers */
 
-#define REG_R16_NDX         18
-#define REG_R17_NDX         19
-#define REG_R18_NDX         20
-#define REG_R19_NDX         21
-#define REG_R20_NDX         22
-#define REG_R21_NDX         23
-#define REG_R22_NDX         24
-#define REG_R23_NDX         25
+#define REG_R16_NDX         19
+#define REG_R17_NDX         20
+#define REG_R18_NDX         21
+#define REG_R19_NDX         22
+#define REG_R20_NDX         23
+#define REG_R21_NDX         24
+#define REG_R22_NDX         25
+#define REG_R23_NDX         26
 
 /* $24-25 = t8-t9: More Volatile registers */
 
-#define REG_R24_NDX         26
-#define REG_R25_NDX         27
+#define REG_R24_NDX         27
+#define REG_R25_NDX         28
 
 /* $26-$27 = ko-k1: Reserved for use in exeption handers.  These do not need
  * to be saved.
@@ -123,34 +124,34 @@
 
 #ifdef MIPS32_SAVE_GP
 
-#  define REG_R28_NDX       28
+#  define REG_R28_NDX       29
 
 /* $29 = sp:  The value of the stack pointer on return from the exception */
 
-#  define REG_R29_NDX       29
+#  define REG_R29_NDX       30
 
 /* $30 = either s8 or fp:  Depends if a frame pointer is used or not */
 
-#  define REG_R30_NDX       30
+#  define REG_R30_NDX       31
 
 /* $31 = ra: Return address */
 
-#  define REG_R31_NDX       31
-#  define XCPTCONTEXT_REGS  32
+#  define REG_R31_NDX       32
+#  define XCPTCONTEXT_REGS  33
 #else
 
 /* $29 = sp:  The value of the stack pointer on return from the exception */
 
-#  define REG_R29_NDX       28
+#  define REG_R29_NDX       29
 
 /* $30 = either s8 or fp:  Depends if a frame pointer is used or not */
 
-#  define REG_R30_NDX       29
+#  define REG_R30_NDX       30
 
 /* $31 = ra: Return address */
 
-#  define REG_R31_NDX       30
-#  define XCPTCONTEXT_REGS  31
+#  define REG_R31_NDX       31
+#  define XCPTCONTEXT_REGS  32
 #endif
 #define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
 
@@ -163,6 +164,7 @@
 #  define REG_MFLO          (4*REG_MFLO_NDX)
 #  define REG_MFHI          (4*REG_MFHI_NDX)
 #  define REG_EPC           (4*REG_EPC_NDX)
+#  define REG_STATUS        (4*REG_STATUS_NDX)
 #  define REG_R1            (4*REG_R1_NDX)
 #  define REG_R2            (4*REG_R2_NDX)
 #  define REG_R3            (4*REG_R3_NDX)
@@ -198,6 +200,7 @@
 #  define REG_MFLO          REG_MFLO_NDX
 #  define REG_MFHI          REG_MFHI_NDX
 #  define REG_EPC           REG_EPC_NDX
+#  define REG_STATUS        REG_STATUS_NDX
 #  define REG_R1            REG_R1_NDX
 #  define REG_R2            REG_R2_NDX
 #  define REG_R3            REG_R3_NDX
@@ -325,6 +328,70 @@ struct xcptcontext
  ****************************************************************************/
 
 /****************************************************************************
+ * Name: cp0_getstatus
+ *
+ * Description:
+ *   Disable interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline irqstate_t cp0_getstatus(void)
+{
+  register irqstate_t status;
+  __asm__ __volatile__
+    (
+      "\t.set    push\n"
+      "\t.set    noat\n"
+      "\t mfc0   %0,$12\n"              /* Get CP0 status register */
+      "\t.set    pop\n"
+      : "=r" (status)
+      :
+      : "memory"
+    );
+
+  return status;
+}
+
+/****************************************************************************
+ * Name: cp0_putstatus
+ *
+ * Description:
+ *   Disable interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+static inline void cp0_putstatus(irqstate_t status)
+{
+  __asm__ __volatile__
+    (
+      "\t.set    push\n"
+      "\t.set    noat\n"
+      "\t.set    noreorder\n"
+      "\tmtc0   %0,$12\n"                /* Set the status to the provided value */
+      "\tnop\n"                          /* MTC0 status hazard: */
+      "\tnop\n"                          /* Recommended spacing: 3 */
+      "\tnop\n"
+      "\tnop\n"                          /* Plus one for good measure */
+      "\t.set    pop\n"
+      : 
+      : "r" (status)
+      : "memory"
+    );
+}
+
+/****************************************************************************
  * Public Variables
  ****************************************************************************/
 
diff --git a/nuttx/arch/mips/src/mips32/up_blocktask.c b/nuttx/arch/mips/src/mips32/up_blocktask.c
new file mode 100755
index 0000000000..ce92452b91
--- /dev/null
+++ b/nuttx/arch/mips/src/mips32/up_blocktask.c
@@ -0,0 +1,167 @@
+/****************************************************************************
+ * arch/mips/src/mips32/up_blocktask.c
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <sched.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include "os_internal.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_block_task
+ *
+ * Description:
+ *   The currently executing task at the head of
+ *   the ready to run list must be stopped.  Save its context
+ *   and move it to the inactive list specified by task_state.
+ *
+ * Inputs:
+ *   tcb: Refers to a task in the ready-to-run list (normally
+ *     the task at the head of the list).  It most be
+ *     stopped, its context saved and moved into one of the
+ *     waiting task lists.  It it was the task at the head
+ *     of the ready-to-run list, then a context to the new
+ *     ready to run task must be performed.
+ *   task_state: Specifies which waiting task list should be
+ *     hold the blocked task TCB.
+ *
+ ****************************************************************************/
+
+void up_block_task(_TCB *tcb, tstate_t task_state)
+{
+  /* Verify that the context switch can be performed */
+
+  if ((tcb->task_state < FIRST_READY_TO_RUN_STATE) ||
+      (tcb->task_state > LAST_READY_TO_RUN_STATE))
+    {
+      PANIC(OSERR_BADBLOCKSTATE);
+    }
+  else
+    {
+      _TCB *rtcb = (_TCB*)g_readytorun.head;
+      bool switch_needed;
+
+      /* Remove the tcb task from the ready-to-run list.  If we
+       * are blocking the task at the head of the task list (the
+       * most likely case), then a context switch to the next
+       * ready-to-run task is needed. In this case, it should
+       * also be true that rtcb == tcb.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Add the task to the specified blocked task list */
+
+      sched_addblocked(tcb, (tstate_t)task_state);
+
+      /* If there are any pending tasks, then add them to the g_readytorun
+       * task list now
+       */
+
+      if (g_pendingtasks.head)
+        {
+          switch_needed |= sched_mergepending();
+        }
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* Are we in an interrupt handler? */
+
+          if (current_regs)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the current_regs into the OLD rtcb.
+               */
+
+               up_savestate(rtcb->xcp.regs);
+
+              /* Restore the exception context of the rtcb at the (new) head 
+               * of the g_readytorun task list.
+               */
+
+              rtcb = (_TCB*)g_readytorun.head;
+
+              /* Then switch contexts */
+
+              up_restorestate(rtcb->xcp.regs);
+            }
+
+          /* No, then we will need to perform the user context switch */
+
+          else
+            {
+              /* Switch context to the context of the task at the head of the
+               * ready to run list.
+               */
+
+               _TCB *nexttcb = (_TCB*)g_readytorun.head;
+               up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
+
+              /* up_switchcontext forces a context switch to the task at the
+               * head of the ready-to-run list.  It does not 'return' in the
+               * normal sense.  When it does return, it is because the blocked
+               * task is again ready to run and has execution priority.
+               */
+           }
+        }
+    }
+}
diff --git a/nuttx/arch/mips/src/mips32/up_copystate.c b/nuttx/arch/mips/src/mips32/up_copystate.c
new file mode 100644
index 0000000000..0f5909aa2e
--- /dev/null
+++ b/nuttx/arch/mips/src/mips32/up_copystate.c
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * arch/mips/src/mips32/up_copystate.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include "os_internal.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_copystate
+ ****************************************************************************/
+
+/* A little faster than most memcpy's */
+
+void up_copystate(uint32_t *dest, uint32_t *src)
+{
+  int i;
+
+  /* In the Cortex-M3 model, the state is copied from the stack to the TCB,
+   * but only a reference is passed to get the state from the TCB.  So the
+   * following check avoids copying the TCB save area onto itself:
+   */
+
+  if (src != dest)
+    {
+      for (i = 0; i < XCPTCONTEXT_REGS; i++)
+        {
+          *dest++ = *src++;
+        }
+    }
+}
+
diff --git a/nuttx/arch/mips/src/mips32/up_doirq.c b/nuttx/arch/mips/src/mips32/up_doirq.c
new file mode 100644
index 0000000000..899f87cfad
--- /dev/null
+++ b/nuttx/arch/mips/src/mips32/up_doirq.c
@@ -0,0 +1,123 @@
+/****************************************************************************
+ * arch/mips/src/mips32/up_doirq.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <assert.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+uint32_t *up_doirq(int irq, uint32_t *regs)
+{
+  up_ledon(LED_INIRQ);
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC(OSERR_ERREXCEPTION);
+#else
+  uint32_t *savestate;
+
+  /* Nested interrupts are not supported in this implementation.  If you want
+   * implemented nested interrupts, you would have to (1) change the way that
+   * current regs is handled and (2) the design associated with
+   * CONFIG_ARCH_INTERRUPTSTACK.
+   */
+
+  /* Current regs non-zero indicates that we are processing an interrupt;
+   * current_regs is also used to manage interrupt level context switches.
+   */
+
+  savestate    = (uint32_t*)current_regs;
+  current_regs = regs;
+
+  /* Mask and acknowledge the interrupt */
+
+  up_maskack_irq(irq);
+
+  /* Deliver the IRQ */
+
+  irq_dispatch(irq, regs);
+
+  /* If a context switch occurred while processing the interrupt then
+   * current_regs may have change value.  If we return any value different
+   * from the input regs, then the lower level will know that a context
+   * switch occurred during interrupt processing.
+   */
+
+  regs = (uint32_t*)current_regs;
+
+  /* Restore the previous value of current_regs.  NULL would indicate that
+   * we are no longer in an interrupt handler.  It will be non-NULL if we
+   * are returning from a nested interrupt.
+   */
+
+  current_regs = savestate;
+
+  /* Unmask the last interrupt (global interrupts are still disabled) */
+
+  up_enable_irq(irq);
+#endif
+  up_ledoff(LED_INIRQ);
+  return regs;
+}
diff --git a/nuttx/arch/mips/src/mips32/up_dumpstate.c b/nuttx/arch/mips/src/mips32/up_dumpstate.c
index 83495e3a2e..0b1c893b8c 100644
--- a/nuttx/arch/mips/src/mips32/up_dumpstate.c
+++ b/nuttx/arch/mips/src/mips32/up_dumpstate.c
@@ -117,8 +117,9 @@ static inline void up_registerdump(void)
 
   if (current_regs)
     {
-      lldbg("MFLO:%08x MFHI:%08x EPC:%08x\n",
-            current_regs[REG_MFLO], current_regs[REG_MFHI], current_regs[REG_EPC]);
+      lldbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
+            current_regs[REG_MFLO], current_regs[REG_MFHI], current_regs[REG_EPC],
+            current_regs[REG_STATUS]);
       lldbg("AT:%08x V0:$08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
             current_regs[REG_AT], current_regs[REG_V0], current_regs[REG_V1],
             current_regs[REG_A0], current_regs[REG_A1], current_regs[REG_A2],
diff --git a/nuttx/arch/mips/src/mips32/up_initialstate.c b/nuttx/arch/mips/src/mips32/up_initialstate.c
new file mode 100644
index 0000000000..8236aaff74
--- /dev/null
+++ b/nuttx/arch/mips/src/mips32/up_initialstate.c
@@ -0,0 +1,130 @@
+/****************************************************************************
+ * arch/arm/src/cortexm3/up_initialstate.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <nuttx/arch.h>
+#include <arch/irq.h>
+#include <arch/mips32/cp0.h>
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB
+ *   has been created. This function is called to initialize
+ *   the processor specific portions of the new TCB.
+ *
+ *   This function must setup the intial architecture registers
+ *   and/or  stack so that execution will begin at tcb->start
+ *   on the next context switch.
+ *
+ ****************************************************************************/
+
+void up_initial_state(_TCB *tcb)
+{
+  struct xcptcontext *xcp = &tcb->xcp;
+  irqstate_t status;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+
+  /* Save the initial stack pointer */
+
+  xcp->regs[REG_SP]      = (uint32_t)tcb->adj_stack_ptr;
+
+  /* Save the task entry point */
+
+  xcp->regs[REG_EPC]     = (uint32_t)tcb->start;
+  
+  /* If this task is running PIC, then set the PIC base register to the
+   * address of the allocated D-Space region.
+   */
+
+#ifdef CONFIG_PIC
+#  warning "Missing logic"
+#endif
+
+  /* Set privileged- or unprivileged-mode, depending on how NuttX is
+   * configured and what kind of thread is being started.
+   *
+   * If the kernel build is not selected, then all threads run in
+   * privileged thread mode.
+   */
+
+#ifdef CONFIG_NUTTX_KERNEL
+#  warning "Missing logic"
+#endif
+
+  /* Enable or disable interrupts, based on user configuration */
+
+  status = cp0_getstatus();
+# ifdef CONFIG_SUPPRESS_INTERRUPTS
+  status   &= ~CP0_STATUS_IM_MASK;  /* Disable all interrupts */
+  status   |= CP0_STATUS_IM_SWINTS; /* Make sure that S/W interrupts enabled */
+#else
+  status   |= CP0_STATUS_IM_ALL;    /* Enable all interrupts */
+# endif
+  xcp->regs[REG_STATUS] = status;
+}
+
diff --git a/nuttx/arch/mips/src/mips32/up_irq.c b/nuttx/arch/mips/src/mips32/up_irq.c
index 0908637dfe..b29c9853fa 100644
--- a/nuttx/arch/mips/src/mips32/up_irq.c
+++ b/nuttx/arch/mips/src/mips32/up_irq.c
@@ -56,70 +56,6 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: cp0_getstatus
- *
- * Description:
- *   Disable interrupts
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-static inline irqstate_t cp0_getstatus(void)
-{
-  register irqstate_t status;
-  __asm__ __volatile__
-    (
-      "\t.set    push\n"
-      "\t.set    noat\n"
-      "\t mfc0   %0,$12\n"              /* Get CP0 status register */
-      "\t.set    pop\n"
-      : "=r" (status)
-      :
-      : "memory"
-    );
-
-  return status;
-}
-
-/****************************************************************************
- * Name: cp0_putstatus
- *
- * Description:
- *   Disable interrupts
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-static inline void cp0_putstatus(irqstate_t status)
-{
-  __asm__ __volatile__
-    (
-      "\t.set    push\n"
-      "\t.set    noat\n"
-      "\t.set    noreorder\n"
-      "\tmtc0   %0,$12\n"                /* Set the status to the provided value */
-      "\tnop\n"                          /* MTC0 status hazard: */
-      "\tnop\n"                          /* Recommended spacing: 3 */
-      "\tnop\n"
-      "\tnop\n"                          /* Plus one for good measure */
-      "\t.set    pop\n"
-      : 
-      : "r" (status)
-      : "memory"
-    );
-}
-
-/****************************************************************************
  * Public Functions
  ****************************************************************************/
 
diff --git a/nuttx/arch/mips/src/pic32mx/Make.defs b/nuttx/arch/mips/src/pic32mx/Make.defs
index 912a3bb418..94bd5b629d 100755
--- a/nuttx/arch/mips/src/pic32mx/Make.defs
+++ b/nuttx/arch/mips/src/pic32mx/Make.defs
@@ -40,8 +40,9 @@ HEAD_ASRC = pic32mx-head.S
 # Common MIPS files
 
 CMN_ASRCS = 
-CMN_CSRCS = up_allocateheap.c up_assert.c up_createstack.c up_exit.c \
-			up_idle.c up_initialize.c up_interruptcontext.c up_irq.c \
+CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
+			up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
+			up_initialstate.c up_interruptcontext.c up_irq.c \
 			up_lowputs.c up_mdelay.c up_modifyreg8.c up_modifyreg16.c \
 			up_modifyreg32.c up_puts.c up_releasestack.c up_udelay.c \
 			up_usestack.c
diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-head.S b/nuttx/arch/mips/src/pic32mx/pic32mx-head.S
index e181365511..fa08804772 100644
--- a/nuttx/arch/mips/src/pic32mx/pic32mx-head.S
+++ b/nuttx/arch/mips/src/pic32mx/pic32mx-head.S
@@ -82,10 +82,6 @@
 	.global os_start
 
 /****************************************************************************
- * Macros
- ****************************************************************************/
-
-/****************************************************************************
  * Name: __reset
  *
  * Description: