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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-12-14 15:32:26 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-12-14 15:32:26 +0000
commit9e96b774dc77f51d965a8b2b9cf3d9d72637aa02 (patch)
tree9f7e0c9e07777acb950d3f2d541394a17ba96122
parent3c4629c7d7b295812152357564bafa87662a74cc (diff)
Add framework for z180 SCC driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5436 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r--nuttx/arch/z80/src/z180/Kconfig326
-rw-r--r--nuttx/arch/z80/src/z180/Make.defs12
-rw-r--r--nuttx/arch/z80/src/z180/z180_config.h140
-rw-r--r--nuttx/arch/z80/src/z180/z180_iomap.h34
-rw-r--r--nuttx/arch/z80/src/z180/z180_lowscc.c135
-rw-r--r--nuttx/arch/z80/src/z180/z180_modifiyreg8.c82
-rw-r--r--nuttx/arch/z80/src/z180/z180_scc.c697
7 files changed, 1402 insertions, 24 deletions
diff --git a/nuttx/arch/z80/src/z180/Kconfig b/nuttx/arch/z80/src/z180/Kconfig
index 3082e69cbb..d00fa643b4 100644
--- a/nuttx/arch/z80/src/z180/Kconfig
+++ b/nuttx/arch/z80/src/z180/Kconfig
@@ -142,12 +142,334 @@ menu "Z180 Peripheral Support"
config Z180_UART0
bool "UART0"
default n
- select ARCH_HAVE_UART0
+ ---help---
+ Select to enable a serial port on UART0. On the Z8x182, bits 0-4 of
+ port B will not be available if ASCI channel 0 is selected.
config Z180_UART1
bool "UART1"
default n
- select ARCH_HAVE_UART1
+ ---help---
+ Select to enable a serial port on UART1. On the Z8x182, bits 5-7 of
+ port B will not be available if ASCI channel 0 is selected.
+
+config Z180_SCC
+ bool "SCC"
+ default n
+ depends on ARCH_CHIP_Z8L181
+ ---help---
+ Select to enable a serial port on the SCC
+
+config Z180_ESCCA
+ bool "ESCC Channel A"
+ default n
+ depends on ARCH_CHIP_Z8L182 && !Z180_PORTC
+ ---help---
+ Select to enable a serial port on ESCC Channel A. Not available
+ if port C is selected.
+
+config Z180_ESCCB
+ bool "ESCC Channel B"
+ default n
+ depends on ARCH_CHIP_Z8L182 && !Z180_MIMIC
+ ---help---
+ Select to enable a serial port on ESCC Channel B
+
+config Z180_TMR1
+ bool "Timer 1"
+ default n
+ ---help---
+ Select to enable a Timer 1 (Timer 0 is used by NuttX as the system timer)
+
+# config Z180_DMA0
+# bool "DMA0"
+# default n
+# ---help---
+# Select to enable support for DMA0
+#
+# config Z180_DMA1
+# bool "DMA1"
+# default n
+# ---help---
+# Select to enable support for DMA1
+
+config Z180_PORTA
+ bool "PORT A"
+ default n
+ depends on ARCH_CHIP_Z8L181 || ARCH_CHIP_Z8L182 || !Z180_CTC
+ ---help---
+ Select to enable a Port A (called PIA1 on the Z8x181)
+
+config Z180_PORTB
+ bool "PORT B"
+ default n
+ depends on ARCH_CHIP_Z8L181 || ARCH_CHIP_Z8L182
+ ---help---
+ Select to enable a Port B (called PIA2 on the Z8x181). On the Z8x182,
+ Bits 5-7 will not be available if ASCI channel 1 is used; Bits 0-4 will
+ not be available if ASCI channel 0 is used.
+
+config Z180_PORTC
+ bool "PORT C"
+ default n
+ depends on ARCH_CHIP_Z8L182 && !Z180_ESCCA
+ ---help---
+ Select to enable a Port C. Not available if ESCC channel A is selected.
+
+config Z180_CTC
+ bool "CTC"
+ default n
+ depends on ARCH_CHIP_Z8L181
+ ---help---
+ Select to enable the Counter/Timer (CTC)
+
+config Z180_MIMIC
+ bool "16550 MIMIC"
+ default n
+ depends on ARCH_CHIP_Z8L182 && !Z180_ESCCB
+ ---help---
+ Select to enable the 16550 MIMIC
+
+endmenu
+
+choice
+ prompt "Serial console"
+ default NO_SERIAL_CONSOLE
+
+config Z180_UART0_SERIAL_CONSOLE
+ bool "UART0"
+ depends on Z180_UART0
+
+config Z180_UART1_SERIAL_CONSOLE
+ bool "UART1"
+ depends on Z180_UART1
+
+config Z180_SCC_SERIAL_CONSOLE
+ bool "SCC"
+ depends on Z180_SCC
+
+config Z180_ESCCA_SERIAL_CONSOLE
+ bool "ESCC Channel A"
+ depends on Z180_ESCCA
+
+config Z180_ESCCB_SERIAL_CONSOLE
+ bool "ESCC Channel B"
+ depends on Z180_ESCCB
+
+endchoice
+
+menu "UART0 Configuration"
+ depends on Z180_UART0
+
+config Z180_UART0_RXBUFSIZE
+ int "Receive Buffer Size"
+ default 64
+ help
+ Characters are buffered as they are received. This specifies
+ the size of the receive buffer.
+
+config Z180_UART0_TXBUFSIZE
+ int "Transmit Buffer Size"
+ default 64
+ help
+ Characters are buffered before being sent. This specifies
+ the size of the transmit buffer.
+
+config Z180_UART0_BAUD
+ int "Baud Rate"
+ default 9600
+ help
+ The configured BAUD of the SCC.
+
+config Z180_UART0_BITS
+ int "Character Size"
+ default 8
+ help
+ The number of bits in one character. Must be either 5, 6, 7, or 8.
+
+config Z180_UART0_PARITY
+ int "Parity Setting"
+ default 0
+ help
+ 0=no parity, 1=odd parity, 2=even parity
+
+config Z180_UART0_2STOP
+ int "use 2 stop bits"
+ default 0
+ help
+ 1=Two stop bits
+
+endmenu
+
+menu "UART1 Configuration"
+ depends on Z180_UART1
+
+config Z180_UART1_RXBUFSIZE
+ int "Receive Buffer Size"
+ default 64
+ help
+ Characters are buffered as they are received. This specifies
+ the size of the receive buffer.
+
+config Z180_UART1_TXBUFSIZE
+ int "Transmit Buffer Size"
+ default 64
+ help
+ Characters are buffered before being sent. This specifies
+ the size of the transmit buffer.
+
+config Z180_UART1_BAUD
+ int "Baud Rate"
+ default 9600
+ help
+ The configured BAUD of the SCC.
+
+config Z180_UART1_BITS
+ int "Character Size"
+ default 8
+ help
+ The number of bits in one character. Must be either 5, 6, 7, or 8.
+
+config Z180_UART1_PARITY
+ int "Parity Setting"
+ default 0
+ help
+ 0=no parity, 1=odd parity, 2=even parity
+
+config Z180_UART1_2STOP
+ int "use 2 stop bits"
+ default 0
+ help
+ 1=Two stop bits
+
+endmenu
+
+menu "SCC Configuration"
+ depends on Z180_SCC
+
+config Z180_SCC_RXBUFSIZE
+ int "Receive Buffer Size"
+ default 64
+ help
+ Characters are buffered as they are received. This specifies
+ the size of the receive buffer.
+
+config Z180_SCC_TXBUFSIZE
+ int "Transmit Buffer Size"
+ default 64
+ help
+ Characters are buffered before being sent. This specifies
+ the size of the transmit buffer.
+
+config Z180_SCC_BAUD
+ int "Baud Rate"
+ default 9600
+ help
+ The configured BAUD of the SCC.
+
+config Z180_SCC_BITS
+ int "Character Size"
+ default 8
+ help
+ The number of bits in one character. Must be either 5, 6, 7, or 8.
+
+config Z180_SCC_PARITY
+ int "Parity Setting"
+ default 0
+ help
+ 0=no parity, 1=odd parity, 2=even parity
+
+config Z180_SCC_2STOP
+ int "use 2 stop bits"
+ default 0
+ help
+ 1=Two stop bits
+
+endmenu
+
+menu "ESCC Channel A Configuration"
+ depends on Z180_ESCCA
+
+config Z180_ESCCA_RXBUFSIZE
+ int "Receive Buffer Size"
+ default 64
+ help
+ Characters are buffered as they are received. This specifies
+ the size of the receive buffer.
+
+config Z180_ESCCA_TXBUFSIZE
+ int "Transmit Buffer Size"
+ default 64
+ help
+ Characters are buffered before being sent. This specifies
+ the size of the transmit buffer.
+
+config Z180_ESCCA_BAUD
+ int "Baud Rate"
+ default 9600
+ help
+ The configured BAUD of the SCC.
+
+config Z180_ESCCA_BITS
+ int "Character Size"
+ default 8
+ help
+ The number of bits in one character. Must be either 5, 6, 7, or 8.
+
+config Z180_ESCCA_PARITY
+ int "Parity Setting"
+ default 0
+ help
+ 0=no parity, 1=odd parity, 2=even parity
+
+config Z180_ESCCA_2STOP
+ int "use 2 stop bits"
+ default 0
+ help
+ 1=Two stop bits
+
+endmenu
+
+menu "ESCC Channel B Configuration"
+ depends on Z180_ESCCB
+
+config Z180_ESCCB_RXBUFSIZE
+ int "Receive Buffer Size"
+ default 64
+ help
+ Characters are buffered as they are received. This specifies
+ the size of the receive buffer.
+
+config Z180_ESCCB_TXBUFSIZE
+ int "Transmit Buffer Size"
+ default 64
+ help
+ Characters are buffered before being sent. This specifies
+ the size of the transmit buffer.
+
+config Z180_ESCCB_BAUD
+ int "Baud Rate"
+ default 9600
+ help
+ The configured BAUD of the SCC.
+
+config Z180_ESCCB_BITS
+ int "Character Size"
+ default 8
+ help
+ The number of bits in one character. Must be either 5, 6, 7, or 8.
+
+config Z180_ESCCB_PARITY
+ int "Parity Setting"
+ default 0
+ help
+ 0=no parity, 1=odd parity, 2=even parity
+
+config Z180_ESCCB_2STOP
+ int "use 2 stop bits"
+ default 0
+ help
+ 1=Two stop bits
endmenu
endif
diff --git a/nuttx/arch/z80/src/z180/Make.defs b/nuttx/arch/z80/src/z180/Make.defs
index f196c45d78..a50c67f39a 100644
--- a/nuttx/arch/z80/src/z180/Make.defs
+++ b/nuttx/arch/z80/src/z180/Make.defs
@@ -41,14 +41,14 @@ HEAD_ASRC = z180_head.asm
endif
endif
-CMN_ASRCS =
-CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c
+CMN_ASRCS =
+CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c
CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c
CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_releasepending.c
CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_unblocktask.c
CMN_CSRCS += up_udelay.c up_usestack.c
-CHIP_ASRCS = z180_restoreusercontext.asm z180_saveusercontext.asm
+CHIP_ASRCS = z180_restoreusercontext.asm z180_saveusercontext.asm
CHIP_ASRCS += z180_vectcommon.asm
ifeq ($(CONFIG_LINKER_ROM_AT_0000),y)
@@ -57,6 +57,6 @@ else
CHIP_ASRCS += z180_vectors.asm
endif
-CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c
-CHIP_CSRCS += z180_mmu.c z180_registerdump.c z180_schedulesigaction.c
-CHIP_CSRCS += z180_sigdeliver.c
+CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c
+CHIP_CSRCS += z180_modifiyreg8.c z180_mmu.c z180_registerdump.c
+CHIP_CSRCS += z180_schedulesigaction.c z180_sigdeliver.c
diff --git a/nuttx/arch/z80/src/z180/z180_config.h b/nuttx/arch/z80/src/z180/z180_config.h
new file mode 100644
index 0000000000..9f5bb95894
--- /dev/null
+++ b/nuttx/arch/z80/src/z180/z180_config.h
@@ -0,0 +1,140 @@
+/************************************************************************************
+ * arch/z80/src/z180/z180_config.h
+ *
+ * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_Z80_SRC_Z180_Z180_CONFIG_H
+#define __ARCH_Z80_SRC_Z180_Z180_CONFIG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <arch/z180/chip.h>
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+/* Verify that selected features match the capability of the selected CPU */
+
+#ifndef HAVE_Z8X181
+# undef CONFIG_Z180_SCC
+# undef CONFIG_Z180_CTC
+#endif
+
+#ifndef HAVE_Z8X182
+# undef CONFIG_Z180_ESCCA
+# undef CONFIG_Z180_ESCCB
+# undef CONFIG_Z180_PORTC
+# undef CONFIG_Z180_MIMIC
+#endif
+
+#if !defined(HAVE_Z8X181) && !defined(HAVE_Z8X182)
+# undef CONFIG_Z180_PORTA
+# undef CONFIG_Z180_PORTB
+#endif
+
+/* Are any UARTs enabled? */
+
+#undef HAVE_SERIAL
+#if defined(CONFIG_Z180_UART0) || defined(CONFIG_Z180_UART1) || \
+ defined(CONFIG_Z180_SCC) || defined(CONFIG_Z180_ESCCA) || \
+ defined(CONFIG_Z180_ESCCB)
+# define HAVE_SERIAL 1
+#endif
+
+/* Make sure all features are disabled for disabled UARTs/[E]SCC channels. This
+ * simplifies checking later.
+ */
+
+#ifndef CONFIG_Z180_UART0
+# undef CONFIG_Z180_UART0_SERIAL_CONSOLE
+#endif
+
+#ifndef CONFIG_Z180_UART1
+# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
+#endif
+
+#ifndef CONFIG_Z180_SCC
+# undef CONFIG_SCC_SERIAL_CONSOLE
+#endif
+
+#ifndef CONFIG_Z180_ESCCA
+# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+#endif
+
+#ifndef CONFIG_Z180_ESCCA
+# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
+#endif
+
+/* Is there a serial console? There should be at most one defined. */
+
+#if defined(CONFIG_Z180_UART0_SERIAL_CONSOLE)
+# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
+# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
+# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
+# define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
+# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
+# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
+# define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_Z180_ESCC_SERIAL_CONSOLE)
+# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
+# define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
+# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
+# define HAVE_SERIAL_CONSOLE 1
+#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
+# define HAVE_SERIAL_CONSOLE 1
+#else
+# undef HAVE_SERIAL_CONSOLE
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_Z80_SRC_Z180_Z180_CONFIG_H */
diff --git a/nuttx/arch/z80/src/z180/z180_iomap.h b/nuttx/arch/z80/src/z180/z180_iomap.h
index 4a695f95d6..c429fe7d31 100644
--- a/nuttx/arch/z80/src/z180/z180_iomap.h
+++ b/nuttx/arch/z80/src/z180/z180_iomap.h
@@ -106,24 +106,26 @@
/* DMA Registers */
-#define Z180_DMA_SAR0L (SFR_OFFSET+0x20) /* DMA Source Address Register Ch 0L */
-#define Z180_DMA_SAR0H (SFR_OFFSET+0x21) /* DMA Source Address Register Ch 0H */
-#define Z180_DMA_SAR0B (SFR_OFFSET+0x22) /* DMA Source Address Register Ch 0B */
-#define Z180_DMA_DAR0L (SFR_OFFSET+0x23) /* DMA Destination Address Register Ch 0L */
-#define Z180_DMA_DAR0H (SFR_OFFSET+0x24) /* DMA Destination Address Register Ch 0H */
-#define Z180_DMA_DAR0B (SFR_OFFSET+0x25) /* DMA Destination Address Register Ch 0B */
-#define Z180_DMA_BCR0L (SFR_OFFSET+0x26) /* DMA Byte Count Register Ch 0L */
-#define Z180_DMA_BCR0H (SFR_OFFSET+0x27) /* DMA Byte Count Register Ch 0H */
-#define Z180_DMA_MAR1L (SFR_OFFSET+0x28) /* DMA Memory Address Register Ch 1L */
-#define Z180_DMA_MAR1H (SFR_OFFSET+0x29) /* DMA Memory Address Register Ch 1H */
-#define Z180_DMA_MAR1B (SFR_OFFSET+0x2a) /* DMA Memory Address Register Ch 1B */
-#define Z180_DMA_IAR1L (SFR_OFFSET+0x2b) /* DMA I/0 Address Register Ch 1L */
-#define Z180_DMA_IAR1H (SFR_OFFSET+0x2c) /* DMA I/0 Address Register Ch 1H */
+#define Z180_DMA0_SARL (SFR_OFFSET+0x20) /* DMA Source Address Register Ch 0L */
+#define Z180_DMA0_SARH (SFR_OFFSET+0x21) /* DMA Source Address Register Ch 0H */
+#define Z180_DMA0_SARB (SFR_OFFSET+0x22) /* DMA Source Address Register Ch 0B */
+#define Z180_DMA0_DARL (SFR_OFFSET+0x23) /* DMA Destination Address Register Ch 0L */
+#define Z180_DMA0_DARH (SFR_OFFSET+0x24) /* DMA Destination Address Register Ch 0H */
+#define Z180_DMA0_DARB (SFR_OFFSET+0x25) /* DMA Destination Address Register Ch 0B */
+#define Z180_DMA0_BCRL (SFR_OFFSET+0x26) /* DMA Byte Count Register Ch 0L */
+#define Z180_DMA0_BCRH (SFR_OFFSET+0x27) /* DMA Byte Count Register Ch 0H */
+
+#define Z180_DMA1_MARL (SFR_OFFSET+0x28) /* DMA Memory Address Register Ch 1L */
+#define Z180_DMA1_MARH (SFR_OFFSET+0x29) /* DMA Memory Address Register Ch 1H */
+#define Z180_DMA1_MARB (SFR_OFFSET+0x2a) /* DMA Memory Address Register Ch 1B */
+#define Z180_DMA1_IARL (SFR_OFFSET+0x2b) /* DMA I/0 Address Register Ch 1L */
+#define Z180_DMA1_IARH (SFR_OFFSET+0x2c) /* DMA I/0 Address Register Ch 1H */
#ifdef HAVE_Z8S180 /* Z8S180/Z8L180 class processors */
-# define Z180_DMA_IAR1B (SFR_OFFSET+0x2d) /* DMA I/O Address Register Ch 1B */
+# define Z180_DMA1_IARB (SFR_OFFSET+0x2d) /* DMA I/O Address Register Ch 1B */
#endif
-#define Z180_DMA_BCR1L (SFR_OFFSET+0x2e) /* DMA Byte Count Register Ch 1L */
-#define Z180_DMA_BCR1H (SFR_OFFSET+0x2f) /* DMA Byte Count Register Ch 1H */
+#define Z180_DMA1_BCRL (SFR_OFFSET+0x2e) /* DMA Byte Count Register Ch 1L */
+#define Z180_DMA1_BCRH (SFR_OFFSET+0x2f) /* DMA Byte Count Register Ch 1H */
+
#define Z180_DMA_DSTAT (SFR_OFFSET+0x30) /* DMA Status Register */
#define Z180_DMA_DMODE (SFR_OFFSET+0x31) /* DMA Mode Register */
#define Z180_DMA_DCNTL (SFR_OFFSET+0x32) /* DMA/WAIT Control Register */
diff --git a/nuttx/arch/z80/src/z180/z180_lowscc.c b/nuttx/arch/z80/src/z180/z180_lowscc.c
new file mode 100644
index 0000000000..b44414d553
--- /dev/null
+++ b/nuttx/arch/z80/src/z180/z180_lowscc.c
@@ -0,0 +1,135 @@
+/****************************************************************************
+ * arch/z80/src/z180/z180_loweruart.c
+ *
+ * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <string.h>
+
+#include <arch/io.h>
+#include <nuttx/arch.h>
+#include <nuttx/sched.h>
+
+#include "chip/chip.h"
+#include "common/up_internal.h"
+#include "z80_config.h"
+
+#ifdef USE_LOWUARTINIT
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/* Select UART parameters for the selected console */
+
+#if defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
+# define CONSOLE_CR Z181_SCC_CR
+# define CONSOLE_DR Z181_SCC_DR
+# define CONSOLE_BAUD CONFIG_Z180_SCC_BAUD
+# define CONSOLE_BITS CONFIG_Z180_SCC_BITS
+# define CONSOLE_2STOP CONFIG_Z180_SCC_2STOP
+# define CONSOLE_PARITY CONFIG_Z180_SCC_PARITY
+
+#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
+# define CONSOLE_CR Z182_ESCCA_CR
+# define CONSOLE_DR Z182_ESCCA_DR
+# define CONSOLE_BAUD CONFIG_Z180_ESCCA_BAUD
+# define CONSOLE_BITS CONFIG_Z180_ESCCA_BITS
+# define CONSOLE_2STOP CONFIG_Z180_ESCCA_2STOP
+# define CONSOLE_PARITY CONFIG_Z180_ESCCA_PARITY
+
+#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
+# define CONSOLE_CR Z182_ESCCB_CR
+# define CONSOLE_DR Z182_ESCCB_DR
+# define CONSOLE_BAUD CONFIG_Z180_ESCCB_BAUD
+# define CONSOLE_BITS CONFIG_Z180_ESCCB_BITS
+# define CONSOLE_PARITY CONFIG_Z180_ESCCB_PARITY
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+static void z180_setbaud(void)
+{
+#warning "Missing logic"
+}
+#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_lowuartinit
+ ****************************************************************************/
+
+void up_lowuartinit(void)
+{
+#ifdef HAVE_SERIAL
+#warning "Missing logic"
+
+ /* Configure for usage of {E]SCC channels (whether or not we have a console) */
+
+#ifdef CONFIG_Z180_SCC
+#warning "Missing logic"
+#endif
+
+#ifdef CONFIG_Z180_ESCCA
+#warning "Missing logic"
+#endif
+
+#ifdef CONFIG_Z180_ESCCB
+#warning "Missing logic"
+#endif
+
+ /* Configure the console for immediate usage */
+
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+#warning "Missing logic"
+#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
+#endif /* HAVE_SERIAL */
+}
+
+#endif /* USE_LOWUARTINIT */
diff --git a/nuttx/arch/z80/src/z180/z180_modifiyreg8.c b/nuttx/arch/z80/src/z180/z180_modifiyreg8.c
new file mode 100644
index 0000000000..f5494a6b44
--- /dev/null
+++ b/nuttx/arch/z80/src/z180/z180_modifiyreg8.c
@@ -0,0 +1,82 @@
+/****************************************************************************
+ * arch/arm/src/common/up_modifyreg8.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include <arch/irq.h>
+#include <arch/io.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: modifyreg8
+ *
+ * Description:
+ * Atomically modify the specified bits in a I/O register
+ *
+ ****************************************************************************/
+
+void modifyreg8(uint16_t addr, uint8_t clearbits, uint8_t setbits)
+{
+ irqstate_t flags;
+ uint8_t regval;
+
+ flags = irqsave();
+ regval = inp(addr);
+ regval &= ~clearbits;
+ regval |= setbits;
+ outp(regval, addr);
+ irqrestore(flags);
+}
diff --git a/nuttx/arch/z80/src/z180/z180_scc.c b/nuttx/arch/z80/src/z180/z180_scc.c
new file mode 100644
index 0000000000..b15183bda3
--- /dev/null
+++ b/nuttx/arch/z80/src/z180/z180_scc.c
@@ -0,0 +1,697 @@
+/****************************************************************************
+ * arch/z80/src/ez08/z180_scc.c
+ *
+ * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <unistd.h>
+#include <semaphore.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/serial/serial.h>
+#include <arch/serial.h>
+#include <arch/io.h>
+
+#include "chip/chip.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+#ifdef USE_SERIALDRIVER
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct z180_dev_s
+{
+ uint32_t baud; /* Configured baud */
+ uint8_t cr; /* [E]SCC control register */
+ uint8_t dr; /* [E]SCC data register */
+ uint8_t irq; /* IRQ associated with this [E]SCC */
+ uint8_t parity; /* 0=none, 1=odd, 2=even */
+ uint8_t bits; /* Number of bits (7 or 8) */
+ bool stopbits2; /* true: Configure with 2 (vs 1) */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int z180_setup(struct uart_dev_s *dev);
+static void z180_shutdown(struct uart_dev_s *dev);
+static int z180_attach(struct uart_dev_s *dev);
+static void z180_detach(struct uart_dev_s *dev);
+static int z180_interrrupt(int irq, void *context);
+static int z180_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int z180_receive(struct uart_dev_s *dev, unsigned int *status);
+static void z180_rxint(struct uart_dev_s *dev, bool enable);
+static bool z180_rxavailable(struct uart_dev_s *dev);
+static void z180_send(struct uart_dev_s *dev, int ch);
+static void z180_txint(struct uart_dev_s *dev, bool enable);
+static bool z180_txready(struct uart_dev_s *dev);
+static bool z180_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Variables
+ ****************************************************************************/
+
+struct uart_ops_s g_uart_ops =
+{
+ z180_setup, /* setup */
+ z180_shutdown, /* shutdown */
+ z180_attach, /* attach */
+ z180_detach, /* detach */
+ z180_ioctl, /* ioctl */
+ z180_receive, /* receive */
+ z180_rxint, /* rxint */
+ z180_rxavailable, /* rxavailable */
+ z180_send, /* send */
+ z180_txint, /* txint */
+ z180_txready, /* txready */
+ z180_txempty /* txempty */
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_Z180_SCC
+static char g_scc_rxbuffer[CONFIG_Z180_SCC_RXBUFSIZE];
+static char g_scc_txbuffer[CONFIG_Z180_SCC_TXBUFSIZE];
+#endif
+#ifdef CONFIG_Z180_ESCCA
+static char g_escca_rxbuffer[CONFIG_Z180_ESCCA_RXBUFSIZE];
+static char g_escca_txbuffer[CONFIG_Z180_ESCCA_TXBUFSIZE];
+#endif
+#ifdef CONFIG_Z180_ESCCB
+static char g_esccb_rxbuffer[CONFIG_Z180_ESCCB_RXBUFSIZE];
+static char g_esccb_txbuffer[CONFIG_Z180_ESCCB_TXBUFSIZE];
+#endif
+
+/* This describes the state of the SCC port. */
+
+#ifdef CONFIG_Z180_SCC
+static const struct z180_dev_s g_scc_priv =
+{
+ CONFIG_Z180_SCC_BAUD, /* baud */
+ Z181_SCC_CR, /* cr */
+ Z181_SCC_DR, /* dr */
+ Z180_SCC_IRQ, /* irq */
+ CONFIG_Z180_SCC_PARITY, /* parity */
+ CONFIG_Z180_SCC_BITS, /* bits */
+ CONFIG_Z180_SCC_2STOP /* stopbits2 */
+};
+
+static uart_dev_t g_scc_port =
+{
+ 0, /* open_count */
+ false, /* xmitwaiting */
+ false, /* recvwaiting */
+#ifdef CONFIG_Z180_SCC_SERIAL_CONSOLE
+ true, /* isconsole */
+#else
+ false, /* isconsole */
+#endif
+ { 0 }, /* closesem */
+ { 0 }, /* xmitsem */
+ { 0 }, /* recvsem */
+ {
+ { 0 }, /* xmit.sem */
+ 0, /* xmit.head */
+ 0, /* xmit.tail */
+ CONFIG_Z180_SCC_TXBUFSIZE, /* xmit.size */
+ g_scc_txbuffer, /* xmit.buffer */
+ },
+ {
+ { 0 }, /* recv.sem */
+ 0, /* recv.head */
+ 0, /* recv.tail */
+ CONFIG_Z180_SCC_RXBUFSIZE, /* recv.size */
+ g_scc_rxbuffer, /* recv.buffer */
+ },
+ &g_uart_ops, /* ops */
+ &g_scc_priv, /* priv */
+};
+#endif
+
+/* This describes the state of the ESCC Channel A port. */
+
+#ifdef CONFIG_Z180_ESCCA
+static const struct z180_dev_s g_escca_priv =
+{
+ CONFIG_Z180_ESCCA_BAUD, /* baud */
+ Z182_ESCCA_CR, /* cr */
+ Z182_ESCCA_DR, /* dr */
+ Z180_UART1_IRQ, /* irq */
+ CONFIG_Z180_ESCCA_PARITY, /* parity */
+ CONFIG_Z180_ESCCA_BITS, /* bits */
+ CONFIG_Z180_ESCCA_2STOP /* stopbits2 */
+};
+
+static uart_dev_t g_escca_port =
+{
+ 0, /* open_count */
+ false, /* xmitwaiting */
+ false, /* recvwaiting */
+#ifdef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+ true, /* isconsole */
+#else
+ false, /* isconsole */
+#endif
+ { 0 }, /* closesem */
+ { 0 }, /* xmitsem */
+ { 0 }, /* recvsem */
+ {
+ { 0 }, /* xmit.sem */
+ 0, /* xmit.head */
+ 0, /* xmit.tail */
+ CONFIG_Z180_ESCCA_TXBUFSIZE, /* xmit.size */
+ g_escca_txbuffer, /* xmit.buffer */
+ },
+ {
+ { 0 }, /* recv.sem */
+ 0, /* recv.head */
+ 0, /* recv.tail */
+ CONFIG_Z180_ESCCA_RXBUFSIZE, /* recv.size */
+ g_escca_rxbuffer, /* recv.buffer */
+ },
+ &g_uart_ops, /* ops */
+ &g_escca_priv, /* priv */
+};
+#endif
+
+/* This describes the state of the ESCC Channel B port. */
+
+#ifdef CONFIG_Z180_ESCCB
+static const struct z180_dev_s g_esccb_priv =
+{
+ CONFIG_Z180_ESCCB_BAUD, /* baud */
+ Z182_ESCCB_CR, /* cr */
+ Z182_ESCCB_DR, /* dr */
+ Z180_UART1_IRQ, /* irq */
+ CONFIG_Z180_ESCCB_PARITY, /* parity */
+ CONFIG_Z180_ESCCB_BITS, /* bits */
+ CONFIG_Z180_ESCCB_2STOP /* stopbits2 */
+};
+
+static uart_dev_t g_escca_port =
+{
+ 0, /* open_count */
+ false, /* xmitwaiting */
+ false, /* recvwaiting */
+#ifdef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
+ true, /* isconsole */
+#else
+ false, /* isconsole */
+#endif
+ { 0 }, /* closesem */
+ { 0 }, /* xmitsem */
+ { 0 }, /* recvsem */
+ {
+ { 0 }, /* xmit.sem */
+ 0, /* xmit.head */
+ 0, /* xmit.tail */
+ CONFIG_Z180_ESCCA_TXBUFSIZE, /* xmit.size */
+ g_escca_txbuffer, /* xmit.buffer */
+ },
+ {
+ { 0 }, /* recv.sem */
+ 0, /* recv.head */
+ 0, /* recv.tail */
+ CONFIG_Z180_ESCCA_RXBUFSIZE, /* recv.size */
+ g_escca_rxbuffer, /* recv.buffer */
+ },
+ &g_uart_ops, /* ops */
+ &g_escca_priv, /* priv */
+};
+#endif
+
+/* Now, which one with be tty0/console and which tty1? NOTE: SCC and ESCCA/B and
+ * mutually exclusive.
+ */
+
+#undef CONSOLE_DEV
+#undef TTYS0_DEV
+#undef TTYS1_DEV
+
+#if defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_scc_port
+# define TTYS0_DEV g_scc_port
+#elif defined(CONFIG_Z180_SCC)
+# define TTYS0_DEV g_scc_port
+
+#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_escca_port
+# define TTYS0_DEV g_escca_port
+# if defined(CONFIG_Z180_ESCCB)
+# define TTYS1_DEV g_esccb_port
+# endif
+
+#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_esccb_port
+# define TTYS0_DEV g_esccb_port
+# if defined(CONFIG_Z180_ESCCA)
+# define TTYS1_DEV g_escca_port
+# endif
+
+#elif defined(CONFIG_Z180_ESCCA)
+# define TTYS0_DEV g_escca_port
+# if defined(CONFIG_Z180_ESCCB)
+# define TTYS1_DEV g_esccb_port
+# endif
+
+#elif defined(CONFIG_Z180_ESCCB)
+# define TTYS0_DEV g_esccb_port
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: z180_serialin
+ ****************************************************************************/
+
+static inline uint8_t z180_serialin(struct z180_dev_s *priv, uint8_t regaddr)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_serialout
+ ****************************************************************************/
+
+static inline void z180_serialout(struct z180_dev_s *priv, uint8_t regaddr,
+ uint8_t value)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_disableuartint
+ ****************************************************************************/
+
+static inline void z180_disableuartint(struct z180_dev_s *priv)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_restoreuartint
+ ****************************************************************************/
+
+static inline void z180_restoreuartint(struct z180_dev_s *priv, uint8_t bits)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_waittxready
+ ****************************************************************************/
+
+static inline void z180_waittxready(struct z180_dev_s *priv)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_setbaud
+ ****************************************************************************/
+
+static inline void z180_setbaud(struct z180_dev_s *priv, uint24_t baud)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_setup
+ *
+ * Description:
+ * Configure the UART baud, bits, parity, fifos, etc. This method is called
+ * the first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int z180_setup(struct uart_dev_s *dev)
+{
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+# warning "Missing logic"
+#endif
+ return OK;
+}
+
+/****************************************************************************
+ * Name: z180_shutdown
+ *
+ * Description:
+ * Disable the UART. This method is called when the serial port is closed
+ *
+ ****************************************************************************/
+
+static void z180_shutdown(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_attach
+ *
+ * Description:
+ * Configure the UART to operation in interrupt driven mode. This method is
+ * called when the serial port is opened. Normally, this is just after the
+ * the setup() method is called, however, the serial console may operate in
+ * a non-interrupt driven mode during the boot phase.
+ *
+ * RX and TX interrupts are not enabled when by the attach method (unless the
+ * hardware supports multiple levels of interrupt enabling). The RX and TX
+ * interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int z180_attach(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_detach
+ *
+ * Description:
+ * Detach UART interrupts. This method is called when the serial port is
+ * closed normally just before the shutdown method is called. The exception
+ * is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void z180_detach(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_interrrupt
+ *
+ * Description:
+ * This is the UART interrupt handler. It will be invoked
+ * when an interrupt received on the 'irq' It should call
+ * uart_transmitchars or uart_receivechar to perform the
+ * appropriate data transfers. The interrupt handling logic\
+ * must be able to map the 'irq' number into the approprite
+ * uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int z180_interrrupt(int irq, void *context)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_ioctl
+ *
+ * Description:
+ * All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int z180_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_receive
+ *
+ * Description:
+ * Called (usually) from the interrupt level to receive one character from
+ * the UART. Error bits associated with the receipt are provided in the
+ * the return 'status'.
+ *
+ ****************************************************************************/
+
+static int z180_receive(struct uart_dev_s *dev, unsigned int *status)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_rxint
+ *
+ * Description:
+ * Call to enable or disable RX interrupts
+ *
+ ****************************************************************************/
+
+static void z180_rxint(struct uart_dev_s *dev, bool enable)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_rxavailable
+ *
+ * Description:
+ * Return true if the receive fifo is not empty
+ *
+ ****************************************************************************/
+
+static bool z180_rxavailable(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_send
+ *
+ * Description:
+ * This method will send one byte on the UART
+ *
+ ****************************************************************************/
+
+static void z180_send(struct uart_dev_s *dev, int ch)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_txint
+ *
+ * Description:
+ * Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void z180_txint(struct uart_dev_s *dev, bool enable)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_txready
+ *
+ * Description:
+ * Return true if the tranmsit fifo is not full
+ *
+ ****************************************************************************/
+
+static bool z180_txready(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: z180_txempty
+ *
+ * Description:
+ * Return true if the transmit fifo is empty
+ *
+ ****************************************************************************/
+
+static bool z180_txempty(struct uart_dev_s *dev)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ * Register serial console and serial ports.
+ *
+ ****************************************************************************/
+
+void up_serialinit(void)
+{
+ uint8_t regval;
+
+ /* Make sure that all UART interrupts are disabled */
+#warning "Missing logic"
+
+ /* Configure for usage of [E]SCC channels */
+
+#ifdef CONFIG_Z180_SCC
+# warning "Missing logic"
+#endif
+
+#ifdef CONFIG_Z180_ESCCA
+# warning "Missing logic"
+#endif
+
+#ifdef CONFIG_Z180_ESCCB
+# warning "Missing logic"
+#endif
+
+ /* If there is a console, then configure the console now */
+
+#ifdef CONSOLE_DEV
+ CONSOLE_DEV.isconsole = true;
+ z180_setup(&CONSOLE_DEV);
+#endif
+
+ /* Register console and tty devices */
+
+#ifdef CONSOLE_DEV
+ (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+ (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#ifdef TTYS1_DEV
+ (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ * Provide priority, low-level access to support OS debug
+ * writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef CONSOLE_DEV
+#warning "Missing logic"
+ z180_disableuartint(priv);
+
+ /* Check for LF */
+
+ if (ch == '\n')
+ {
+ /* Output CR before LF*/
+#warning "Missing logic"
+
+ }
+
+ /* Output the character */
+
+#warning "Missing logic"
+
+ /* Wait for the character to be sent before re-enabling interrupts */
+
+#warning "Missing logic"
+ return ch;
+#endif
+}
+
+#else /* USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: z180_putc
+ ****************************************************************************/
+
+static void z180_putc(int ch)
+{
+#warning "Missing logic"
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_putc
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+ /* Check for LF */
+
+ if (ch == '\n')
+ {
+ /* Output CR before LF */
+
+ z180_putc('\r');
+ }
+
+ /* Output character */
+
+ z180_putc(ch);
+ return ch;
+}
+
+#endif /* USE_SERIALDRIVER */