diff options
author | Philipp Maier <pmaier@sysmocom.de> | 2020-11-12 11:33:54 +0100 |
---|---|---|
committer | laforge <laforge@osmocom.org> | 2020-11-12 15:55:31 +0000 |
commit | e36be56fc8ba7019f423ebd8c315ebbe836a906f (patch) | |
tree | bc085ec44f07aeeb58537fb8426a1f68b71eea06 /tests/gsm0408 | |
parent | af10e48c1bf7ec40678b9a4387fc50ab0846b467 (diff) |
gsm_04_08: add parser for Mobile Station Classmark 3
3GPP TS 24.008 section 10.5.1.7 describes a Mobile Station Classmark 3
IE, which is encoded as CSN.1 struct. This means that it can not be
parsed by just casting a memory location to a struct pointer, so lets
add a parser to parse the CM3 IE.
This is fixed version of Ic8b2bfd00330235f5bed00771e421588abfaac1f,
which got reverted because it used the keyword "class" as struct member,
which lead into problems with c++ builds. This is now fixed.
Change-Id: Id8732551b33616227609cd6fcf6c3133751a89eb
Related: OS#4796 SYS#5114
Diffstat (limited to 'tests/gsm0408')
-rw-r--r-- | tests/gsm0408/gsm0408_test.c | 198 | ||||
-rw-r--r-- | tests/gsm0408/gsm0408_test.ok | 342 |
2 files changed, 540 insertions, 0 deletions
diff --git a/tests/gsm0408/gsm0408_test.c b/tests/gsm0408/gsm0408_test.c index d2ae6f6c..5a596397 100644 --- a/tests/gsm0408/gsm0408_test.c +++ b/tests/gsm0408/gsm0408_test.c @@ -327,6 +327,203 @@ static void test_lai_encode_decode(void) } } +static void dump_cm3(struct gsm48_classmark3 *cm3) +{ + printf("mult_band_supp=%02x\n", cm3->mult_band_supp); + printf("a5_bits=%02x\n", cm3->a5_bits); + printf("assoc_radio_cap_1=%02x\n", cm3->assoc_radio_cap_1); + printf("assoc_radio_cap_2=%02x\n", cm3->assoc_radio_cap_2); + printf("\n"); + printf("r_support.present=%u\n", cm3->r_support.present); + printf("r_support.r_gsm_assoc_radio_cap=%02x\n", + cm3->r_support.r_gsm_assoc_radio_cap); + printf("\n"); + printf("hscsd_mult_slot_cap.present=%u\n", + cm3->hscsd_mult_slot_cap.present); + printf("hscsd_mult_slot_cap.mslot_class=%02x\n", + cm3->hscsd_mult_slot_cap.mslot_class); + printf("\n"); + printf("ucs2_treatment=%u\n", cm3->ucs2_treatment); + printf("extended_meas_cap=%u\n", cm3->extended_meas_cap); + printf("\n"); + printf("ms_meas_cap.present=%u\n", cm3->ms_meas_cap.present); + printf("ms_meas_cap.sms_value=%02x\n", cm3->ms_meas_cap.sms_value); + printf("ms_meas_cap.sm_value=%02x\n", cm3->ms_meas_cap.sm_value); + printf("\n"); + printf("ms_pos_method_cap.present=%u\n", + cm3->ms_pos_method_cap.present); + printf("ms_pos_method_cap.method=%02x\n", + cm3->ms_pos_method_cap.method); + printf("\n"); + printf("ecsd_multislot_cap.present=%u\n", + cm3->ecsd_multislot_cap.present); + printf("ecsd_multislot_cap.mslot_class=%02x\n", + cm3->ecsd_multislot_cap.mslot_class); + printf("\n"); + printf("psk8_struct.present=%u\n", cm3->psk8_struct.present); + printf("psk8_struct.mod_cap=%u\n", cm3->psk8_struct.mod_cap); + printf("psk8_struct.rf_pwr_cap_1.present=%u\n", + cm3->psk8_struct.rf_pwr_cap_1.present); + printf("psk8_struct.rf_pwr_cap_1.value=%02x\n", + cm3->psk8_struct.rf_pwr_cap_1.value); + printf("psk8_struct.rf_pwr_cap_2.present=%u\n", + cm3->psk8_struct.rf_pwr_cap_2.present); + printf("psk8_struct.rf_pwr_cap_2.value=%02x\n", + cm3->psk8_struct.rf_pwr_cap_2.value); + printf("\n"); + printf("gsm_400_bands_supp.present=%u\n", + cm3->gsm_400_bands_supp.present); + printf("gsm_400_bands_supp.value=%02x\n", + cm3->gsm_400_bands_supp.value); + printf("gsm_400_bands_supp.assoc_radio_cap=%02x\n", + cm3->gsm_400_bands_supp.assoc_radio_cap); + printf("\n"); + printf("gsm_850_assoc_radio_cap.present=%u\n", + cm3->gsm_850_assoc_radio_cap.present); + printf("gsm_850_assoc_radio_cap.value=%02x\n", + cm3->gsm_850_assoc_radio_cap.value); + printf("\n"); + printf("gsm_1900_assoc_radio_cap.present=%u\n", + cm3->gsm_1900_assoc_radio_cap.present); + printf("gsm_1900_assoc_radio_cap.value=%02x\n", + cm3->gsm_1900_assoc_radio_cap.value); + printf("\n"); + printf("umts_fdd_rat_cap=%u\n", cm3->umts_fdd_rat_cap); + printf("umts_tdd_rat_cap=%u\n", cm3->umts_tdd_rat_cap); + printf("cdma200_rat_cap=%u\n", cm3->cdma200_rat_cap); + printf("\n"); + printf("dtm_gprs_multislot_cap.present=%u\n", + cm3->dtm_gprs_multislot_cap.present); + printf("dtm_gprs_multislot_cap.mslot_class=%02x\n", + cm3->dtm_gprs_multislot_cap.mslot_class); + printf("dtm_gprs_multislot_cap.single_slot_dtm=%u\n", + cm3->dtm_gprs_multislot_cap.single_slot_dtm); + printf("dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=%u\n", + cm3->dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present); + printf("dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=%02x\n", + cm3->dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class); + printf("\n"); + printf("single_band_supp.present=%u\n", cm3->single_band_supp.present); + printf("single_band_supp.value=%u\n", cm3->single_band_supp.value); + printf("\n"); + printf("gsm_750_assoc_radio_cap.present=%u\n", + cm3->gsm_750_assoc_radio_cap.present); + printf("gsm_750_assoc_radio_cap.value=%02x\n", + cm3->gsm_750_assoc_radio_cap.value); + printf("\n"); + printf("umts_1_28_mcps_tdd_rat_cap=%u\n", + cm3->umts_1_28_mcps_tdd_rat_cap); + printf("geran_feature_package=%u\n", cm3->geran_feature_package); + printf("\n"); + printf("extended_dtm_gprs_multislot_cap.present=%u\n", + cm3->extended_dtm_gprs_multislot_cap.present); + printf("extended_dtm_gprs_multislot_cap.mslot_class=%02x\n", + cm3->extended_dtm_gprs_multislot_cap.mslot_class); + printf + ("extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=%u\n", + cm3->extended_dtm_gprs_multislot_cap. + extended_dtm_egprs_multislot_cap.present); + printf + ("extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=%02x\n", + cm3->extended_dtm_gprs_multislot_cap. + extended_dtm_egprs_multislot_cap.mslot_class); + printf("\n"); + printf("high_multislot_cap.present=%u\n", + cm3->high_multislot_cap.present); + printf("high_multislot_cap.value=%02x\n", + cm3->high_multislot_cap.value); + printf("\n"); + printf("geran_feature_package_2=%u\n", cm3->geran_feature_package_2); + printf("gmsk_multislot_power_prof=%02x\n", + cm3->gmsk_multislot_power_prof); + printf("psk8_multislot_power_prof=%02x\n", + cm3->psk8_multislot_power_prof); + printf("\n"); + printf("t_gsm_400_bands_supp.present=%u\n", + cm3->t_gsm_400_bands_supp.present); + printf("t_gsm_400_bands_supp.value=%02x\n", + cm3->t_gsm_400_bands_supp.value); + printf("t_gsm_400_bands_supp.assoc_radio_cap=%02x\n", + cm3->t_gsm_400_bands_supp.assoc_radio_cap); + printf("\n"); + printf("dl_advanced_rx_perf=%02x\n", cm3->dl_advanced_rx_perf); + printf("dtm_enhancements_cap=%u\n", cm3->dtm_enhancements_cap); + printf("\n"); + printf("dtm_gprs_high_multislot_cap.present=%u\n", + cm3->dtm_gprs_high_multislot_cap.present); + printf("dtm_gprs_high_multislot_cap.mslot_class=%02x\n", + cm3->dtm_gprs_high_multislot_cap.mslot_class); + printf("dtm_gprs_high_multislot_cap.offset_required=%u\n", + cm3->dtm_gprs_high_multislot_cap.offset_required); + printf + ("dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.present=%u\n", + cm3->dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap. + present); + printf + ("dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.mslot_class=%02x\n", + cm3->dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap. + mslot_class); + printf("\n"); + printf("repeated_acch_capability=%u\n", cm3->repeated_acch_capability); + printf("\n"); + printf("gsm_710_assoc_radio_cap.present=%u\n", + cm3->gsm_710_assoc_radio_cap.present); + printf("gsm_710_assoc_radio_cap.value=%02x\n", + cm3->gsm_710_assoc_radio_cap.value); + printf("\n"); + printf("t_gsm_810_assoc_radio_cap.present=%u\n", + cm3->t_gsm_810_assoc_radio_cap.present); + printf("t_gsm_810_assoc_radio_cap.value=%02x\n", + cm3->t_gsm_810_assoc_radio_cap.value); + printf("\n"); + printf("ciphering_mode_setting_cap=%u\n", + cm3->ciphering_mode_setting_cap); + printf("add_pos_cap=%u\n", cm3->add_pos_cap); + printf("e_utra_fdd_supp=%u\n", cm3->e_utra_fdd_supp); + printf("e_utra_tdd_supp=%u\n", cm3->e_utra_tdd_supp); + printf("e_utra_meas_rep_supp=%u\n", cm3->e_utra_meas_rep_supp); + printf("prio_resel_supp=%u\n", cm3->prio_resel_supp); + printf("utra_csg_cells_rep=%u\n", cm3->utra_csg_cells_rep); + printf("vamos_level=%02x\n", cm3->vamos_level); + printf("tighter_capability=%02x\n", cm3->tighter_capability); + printf("sel_ciph_dl_sacch=%u\n", cm3->sel_ciph_dl_sacch); + printf("cs_ps_srvcc_geran_utra=%02x\n", cm3->cs_ps_srvcc_geran_utra); + printf("cs_ps_srvcc_geran_eutra=%02x\n", cm3->cs_ps_srvcc_geran_eutra); + printf("geran_net_sharing=%u\n", cm3->geran_net_sharing); + printf("e_utra_wb_rsrq_meas_supp=%u\n", cm3->e_utra_wb_rsrq_meas_supp); + printf("er_band_support=%u\n", cm3->er_band_support); + printf("utra_mult_band_ind_supp=%u\n", cm3->utra_mult_band_ind_supp); + printf("e_utra_mult_band_ind_supp=%u\n", + cm3->e_utra_mult_band_ind_supp); + printf("extended_tsc_set_cap_supp=%u\n", + cm3->extended_tsc_set_cap_supp); + printf("extended_earfcn_val_range=%u\n", + cm3->extended_earfcn_val_range); +} + +static void test_decode_classmark3(void) +{ + struct gsm48_classmark3 cm3; + const uint8_t cm3_1[] = { 0x60, 0x14, 0x04, 0x2f, 0x65, 0x00, 0x20, 0x03, 0x40, 0x4a }; + const uint8_t cm3_2[] = { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55}; + const uint8_t cm3_3[] = { 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa}; + + printf("=====cm3_1=====\n"); + gsm48_decode_classmark3(&cm3, cm3_1, sizeof(cm3_1)); + dump_cm3(&cm3); + printf("\n"); + + printf("=====cm3_2=====\n"); + gsm48_decode_classmark3(&cm3, cm3_2, sizeof(cm3_2)); + dump_cm3(&cm3); + printf("\n"); + + printf("=====cm3_3=====\n"); + gsm48_decode_classmark3(&cm3, cm3_3, sizeof(cm3_3)); + dump_cm3(&cm3); + printf("\n"); +} + static void test_mid_from_tmsi(void) { static const uint8_t res[] = { 0x17, 0x05, 0xf4, 0xaa, 0xbb, 0xcc, 0xdd }; @@ -1550,6 +1747,7 @@ int main(int argc, char **argv) test_bcd_number_encode_decode(); test_ra_cap(); test_lai_encode_decode(); + test_decode_classmark3(); test_si_range_helpers(); test_arfcn_filter(); diff --git a/tests/gsm0408/gsm0408_test.ok b/tests/gsm0408/gsm0408_test.ok index 3e6ae1f4..52c4ea72 100644 --- a/tests/gsm0408/gsm0408_test.ok +++ b/tests/gsm0408/gsm0408_test.ok @@ -385,6 +385,348 @@ RA test...passed Encoded 21 63 54 00 17 gsm48_decode_lai2() gives 123-456-23 (3-digit MNC) passed +=====cm3_1===== +mult_band_supp=06 +a5_bits=00 +assoc_radio_cap_1=04 +assoc_radio_cap_2=01 + +r_support.present=0 +r_support.r_gsm_assoc_radio_cap=00 + +hscsd_mult_slot_cap.present=0 +hscsd_mult_slot_cap.mslot_class=00 + +ucs2_treatment=0 +extended_meas_cap=0 + +ms_meas_cap.present=0 +ms_meas_cap.sms_value=00 +ms_meas_cap.sm_value=00 + +ms_pos_method_cap.present=1 +ms_pos_method_cap.method=01 + +ecsd_multislot_cap.present=0 +ecsd_multislot_cap.mslot_class=00 + +psk8_struct.present=1 +psk8_struct.mod_cap=1 +psk8_struct.rf_pwr_cap_1.present=1 +psk8_struct.rf_pwr_cap_1.value=02 +psk8_struct.rf_pwr_cap_2.present=1 +psk8_struct.rf_pwr_cap_2.value=02 + +gsm_400_bands_supp.present=0 +gsm_400_bands_supp.value=00 +gsm_400_bands_supp.assoc_radio_cap=00 + +gsm_850_assoc_radio_cap.present=1 +gsm_850_assoc_radio_cap.value=04 + +gsm_1900_assoc_radio_cap.present=0 +gsm_1900_assoc_radio_cap.value=00 + +umts_fdd_rat_cap=0 +umts_tdd_rat_cap=0 +cdma200_rat_cap=0 + +dtm_gprs_multislot_cap.present=0 +dtm_gprs_multislot_cap.mslot_class=00 +dtm_gprs_multislot_cap.single_slot_dtm=0 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=0 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=00 + +single_band_supp.present=0 +single_band_supp.value=0 + +gsm_750_assoc_radio_cap.present=0 +gsm_750_assoc_radio_cap.value=00 + +umts_1_28_mcps_tdd_rat_cap=0 +geran_feature_package=1 + +extended_dtm_gprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.mslot_class=00 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=00 + +high_multislot_cap.present=0 +high_multislot_cap.value=00 + +geran_feature_package_2=0 +gmsk_multislot_power_prof=00 +psk8_multislot_power_prof=00 + +t_gsm_400_bands_supp.present=0 +t_gsm_400_bands_supp.value=00 +t_gsm_400_bands_supp.assoc_radio_cap=00 + +dl_advanced_rx_perf=01 +dtm_enhancements_cap=1 + +dtm_gprs_high_multislot_cap.present=0 +dtm_gprs_high_multislot_cap.mslot_class=00 +dtm_gprs_high_multislot_cap.offset_required=0 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.present=0 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.mslot_class=00 + +repeated_acch_capability=1 + +gsm_710_assoc_radio_cap.present=0 +gsm_710_assoc_radio_cap.value=00 + +t_gsm_810_assoc_radio_cap.present=0 +t_gsm_810_assoc_radio_cap.value=00 + +ciphering_mode_setting_cap=0 +add_pos_cap=0 +e_utra_fdd_supp=0 +e_utra_tdd_supp=0 +e_utra_meas_rep_supp=0 +prio_resel_supp=1 +utra_csg_cells_rep=0 +vamos_level=01 +tighter_capability=01 +sel_ciph_dl_sacch=0 +cs_ps_srvcc_geran_utra=00 +cs_ps_srvcc_geran_eutra=00 +geran_net_sharing=0 +e_utra_wb_rsrq_meas_supp=0 +er_band_support=0 +utra_mult_band_ind_supp=0 +e_utra_mult_band_ind_supp=0 +extended_tsc_set_cap_supp=0 +extended_earfcn_val_range=0 + +=====cm3_2===== +mult_band_supp=05 +a5_bits=05 +assoc_radio_cap_1=05 +assoc_radio_cap_2=05 + +r_support.present=0 +r_support.r_gsm_assoc_radio_cap=00 + +hscsd_mult_slot_cap.present=1 +hscsd_mult_slot_cap.mslot_class=0a + +ucs2_treatment=1 +extended_meas_cap=0 + +ms_meas_cap.present=1 +ms_meas_cap.sms_value=05 +ms_meas_cap.sm_value=05 + +ms_pos_method_cap.present=0 +ms_pos_method_cap.method=00 + +ecsd_multislot_cap.present=1 +ecsd_multislot_cap.mslot_class=0a + +psk8_struct.present=1 +psk8_struct.mod_cap=0 +psk8_struct.rf_pwr_cap_1.present=1 +psk8_struct.rf_pwr_cap_1.value=01 +psk8_struct.rf_pwr_cap_2.present=0 +psk8_struct.rf_pwr_cap_2.value=00 + +gsm_400_bands_supp.present=1 +gsm_400_bands_supp.value=01 +gsm_400_bands_supp.assoc_radio_cap=05 + +gsm_850_assoc_radio_cap.present=0 +gsm_850_assoc_radio_cap.value=00 + +gsm_1900_assoc_radio_cap.present=1 +gsm_1900_assoc_radio_cap.value=05 + +umts_fdd_rat_cap=0 +umts_tdd_rat_cap=1 +cdma200_rat_cap=0 + +dtm_gprs_multislot_cap.present=1 +dtm_gprs_multislot_cap.mslot_class=01 +dtm_gprs_multislot_cap.single_slot_dtm=0 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=1 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=01 + +single_band_supp.present=0 +single_band_supp.value=0 + +gsm_750_assoc_radio_cap.present=1 +gsm_750_assoc_radio_cap.value=05 + +umts_1_28_mcps_tdd_rat_cap=0 +geran_feature_package=1 + +extended_dtm_gprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.mslot_class=00 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=00 + +high_multislot_cap.present=1 +high_multislot_cap.value=01 + +geran_feature_package_2=1 +gmsk_multislot_power_prof=01 +psk8_multislot_power_prof=01 + +t_gsm_400_bands_supp.present=0 +t_gsm_400_bands_supp.value=00 +t_gsm_400_bands_supp.assoc_radio_cap=00 + +dl_advanced_rx_perf=01 +dtm_enhancements_cap=0 + +dtm_gprs_high_multislot_cap.present=1 +dtm_gprs_high_multislot_cap.mslot_class=02 +dtm_gprs_high_multislot_cap.offset_required=1 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.present=0 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.mslot_class=00 + +repeated_acch_capability=1 + +gsm_710_assoc_radio_cap.present=0 +gsm_710_assoc_radio_cap.value=00 + +t_gsm_810_assoc_radio_cap.present=1 +t_gsm_810_assoc_radio_cap.value=05 + +ciphering_mode_setting_cap=0 +add_pos_cap=1 +e_utra_fdd_supp=0 +e_utra_tdd_supp=0 +e_utra_meas_rep_supp=0 +prio_resel_supp=0 +utra_csg_cells_rep=0 +vamos_level=00 +tighter_capability=00 +sel_ciph_dl_sacch=0 +cs_ps_srvcc_geran_utra=00 +cs_ps_srvcc_geran_eutra=00 +geran_net_sharing=0 +e_utra_wb_rsrq_meas_supp=0 +er_band_support=0 +utra_mult_band_ind_supp=0 +e_utra_mult_band_ind_supp=0 +extended_tsc_set_cap_supp=0 +extended_earfcn_val_range=0 + +=====cm3_3===== +mult_band_supp=02 +a5_bits=0a +assoc_radio_cap_1=0a +assoc_radio_cap_2=00 + +r_support.present=1 +r_support.r_gsm_assoc_radio_cap=02 + +hscsd_mult_slot_cap.present=1 +hscsd_mult_slot_cap.mslot_class=0a + +ucs2_treatment=1 +extended_meas_cap=0 + +ms_meas_cap.present=1 +ms_meas_cap.sms_value=05 +ms_meas_cap.sm_value=05 + +ms_pos_method_cap.present=0 +ms_pos_method_cap.method=00 + +ecsd_multislot_cap.present=1 +ecsd_multislot_cap.mslot_class=0a + +psk8_struct.present=1 +psk8_struct.mod_cap=0 +psk8_struct.rf_pwr_cap_1.present=1 +psk8_struct.rf_pwr_cap_1.value=01 +psk8_struct.rf_pwr_cap_2.present=0 +psk8_struct.rf_pwr_cap_2.value=00 + +gsm_400_bands_supp.present=1 +gsm_400_bands_supp.value=01 +gsm_400_bands_supp.assoc_radio_cap=05 + +gsm_850_assoc_radio_cap.present=0 +gsm_850_assoc_radio_cap.value=00 + +gsm_1900_assoc_radio_cap.present=1 +gsm_1900_assoc_radio_cap.value=05 + +umts_fdd_rat_cap=0 +umts_tdd_rat_cap=1 +cdma200_rat_cap=0 + +dtm_gprs_multislot_cap.present=1 +dtm_gprs_multislot_cap.mslot_class=01 +dtm_gprs_multislot_cap.single_slot_dtm=0 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=1 +dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=01 + +single_band_supp.present=0 +single_band_supp.value=0 + +gsm_750_assoc_radio_cap.present=1 +gsm_750_assoc_radio_cap.value=05 + +umts_1_28_mcps_tdd_rat_cap=0 +geran_feature_package=1 + +extended_dtm_gprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.mslot_class=00 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.present=0 +extended_dtm_gprs_multislot_cap.dtm_egprs_multislot_cap.mslot_class=00 + +high_multislot_cap.present=1 +high_multislot_cap.value=01 + +geran_feature_package_2=1 +gmsk_multislot_power_prof=01 +psk8_multislot_power_prof=01 + +t_gsm_400_bands_supp.present=0 +t_gsm_400_bands_supp.value=00 +t_gsm_400_bands_supp.assoc_radio_cap=00 + +dl_advanced_rx_perf=01 +dtm_enhancements_cap=0 + +dtm_gprs_high_multislot_cap.present=1 +dtm_gprs_high_multislot_cap.mslot_class=02 +dtm_gprs_high_multislot_cap.offset_required=1 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.present=0 +dtm_gprs_high_multislot_cap.dtm_egprs_high_multislot_cap.mslot_class=00 + +repeated_acch_capability=1 + +gsm_710_assoc_radio_cap.present=0 +gsm_710_assoc_radio_cap.value=00 + +t_gsm_810_assoc_radio_cap.present=1 +t_gsm_810_assoc_radio_cap.value=04 + +ciphering_mode_setting_cap=0 +add_pos_cap=0 +e_utra_fdd_supp=0 +e_utra_tdd_supp=0 +e_utra_meas_rep_supp=0 +prio_resel_supp=0 +utra_csg_cells_rep=0 +vamos_level=00 +tighter_capability=00 +sel_ciph_dl_sacch=0 +cs_ps_srvcc_geran_utra=00 +cs_ps_srvcc_geran_eutra=00 +geran_net_sharing=0 +e_utra_wb_rsrq_meas_supp=0 +er_band_support=0 +utra_mult_band_ind_supp=0 +e_utra_mult_band_ind_supp=0 +extended_tsc_set_cap_supp=0 +extended_earfcn_val_range=0 + Element is: 2 => freqs[i] = 121 Element is: 2 => freqs[i] = 1 Element is: 0 => freqs[i] = 68 |