aboutsummaryrefslogtreecommitdiffstats
path: root/python/trx/radio_if.py
diff options
context:
space:
mode:
authorVadim Yanitskiy <axilirator@gmail.com>2019-01-19 11:55:01 +0700
committerVadim Yanitskiy <axilirator@gmail.com>2019-01-22 14:41:30 +0700
commit89e1ad11380f2c20e8da76e861d28a6b886eb977 (patch)
treeb8b05b83afdce0478a31539dc5580dccf4eece74 /python/trx/radio_if.py
parent404842da1135b439b610e755a28f7e1494f78822 (diff)
python/trx: fork RadioInterfaceUHD from RadioInterface
Diffstat (limited to 'python/trx/radio_if.py')
-rw-r--r--python/trx/radio_if.py48
1 files changed, 19 insertions, 29 deletions
diff --git a/python/trx/radio_if.py b/python/trx/radio_if.py
index 4c678e7..41d20fd 100644
--- a/python/trx/radio_if.py
+++ b/python/trx/radio_if.py
@@ -2,7 +2,7 @@
# -*- coding: utf-8 -*-
# GR-GSM based transceiver
-# Follow graph implementation
+# Generic (device independent) flow-graph implementation
#
# (C) 2016-2019 by Vadim Yanitskiy <axilirator@gmail.com>
# (C) 2017 by Piotr Krysik <ptrkrysik@gmail.com>
@@ -33,7 +33,6 @@ from math import pi
from gnuradio import eng_notation
from gnuradio import digital
from gnuradio import blocks
-from gnuradio import uhd
from gnuradio import gr
from gnuradio import filter
@@ -83,6 +82,10 @@ class RadioInterface(gr.top_block):
self.ppm = phy_ppm
self.freq_offset = phy_freq_offset
+ self.phy_args = phy_args
+ self.rx_antenna = phy_rx_antenna
+ self.tx_antenna = phy_tx_antenna
+
gr.top_block.__init__(self, "GR-GSM TRX")
# TRX Burst Interface
@@ -91,15 +94,7 @@ class RadioInterface(gr.top_block):
str(trx_base_port))
# RX path definition
- self.phy_src = uhd.usrp_source(phy_args,
- uhd.stream_args(cpu_format="fc32",
- channels=range(1)))
-
- self.phy_src.set_clock_rate(26e6, uhd.ALL_MBOARDS)
- self.phy_src.set_antenna(phy_rx_antenna, 0)
- self.phy_src.set_samp_rate(phy_sample_rate)
- self.phy_src.set_bandwidth(650e3, 0)
- self.phy_src.set_gain(phy_rx_gain)
+ self.phy_init_source()
self.msg_to_tag_src = grgsm.msg_to_tag()
@@ -115,7 +110,7 @@ class RadioInterface(gr.top_block):
# Connections
self.connect(
- (self.phy_src, 0),
+ (self._phy_src, 0),
(self.msg_to_tag_src, 0))
self.connect(
@@ -140,14 +135,7 @@ class RadioInterface(gr.top_block):
# TX Path Definition
- self.phy_sink = uhd.usrp_sink(phy_args,
- uhd.stream_args(cpu_format="fc32",
- channels=range(1)), "packet_len")
-
- self.phy_sink.set_clock_rate(26e6, uhd.ALL_MBOARDS)
- self.phy_sink.set_antenna(phy_tx_antenna, 0)
- self.phy_sink.set_samp_rate(phy_sample_rate)
- self.phy_sink.set_gain(self.tx_gain)
+ self.phy_init_sink()
self.tx_time_setter = grgsm.txtime_setter(
0xffffffff, 0, 0, 0, 0, 0,
@@ -200,7 +188,7 @@ class RadioInterface(gr.top_block):
self.connect(
(self.rotator_sink, 0),
- (self.phy_sink, 0))
+ (self._phy_sink, 0))
# RX & TX synchronization
@@ -245,11 +233,11 @@ class RadioInterface(gr.top_block):
(self.dict_toggle_sign, 'dict_out'),
(self.msg_to_tag_sink, 'msg'))
+ def phy_init_source(self):
+ raise NotImplementedError
- # Some UHD devices (such as UmTRX) do start the clock
- # not from 0, so it's required to reset it manually.
- # Resetting UHD source will also affect the sink.
- self.phy_src.set_time_now(uhd.time_spec(0.0))
+ def phy_init_sink(self):
+ raise NotImplementedError
def shutdown(self):
print("[i] Shutdown Radio interface")
@@ -281,9 +269,10 @@ class RadioInterface(gr.top_block):
print("[#] Shifting RX freq. to %s (offset is %s)"
% (eng_notation.num_to_str(fc),
eng_notation.num_to_str(self.freq_offset)))
- self.phy_src.set_center_freq(fc, 0)
+
self.rotator_src.set_phase_inc(self.calc_phase_inc(fc))
self.gsm_clck_ctrl.set_fc(fc)
+ self.phy_set_rx_freq(fc)
self.rx_freq = fc
def set_tx_freq(self, fc):
@@ -292,16 +281,17 @@ class RadioInterface(gr.top_block):
print("[#] Shifting TX freq. to %s (offset is %s)"
% (eng_notation.num_to_str(fc),
eng_notation.num_to_str(self.freq_offset)))
- self.phy_sink.set_center_freq(fc, 0)
+
self.rotator_sink.set_phase_inc(-self.calc_phase_inc(fc))
+ self.phy_set_tx_freq(fc)
self.tx_freq = fc
def set_rx_gain(self, gain):
- self.phy_src.set_gain(gain, 0)
+ self.phy_set_rx_gain(gain)
self.rx_gain = gain
def set_tx_gain(self, gain):
- self.phy_sink.set_gain(gain, 0)
+ self.phy_set_tx_gain(gain)
self.tx_gain = gain
def set_slot(self, slot, config):