From c853db4ca17d1ed3633e776ffe64d51cb902c235 Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Wed, 16 May 2018 09:22:31 +0200 Subject: initial "sam_e1" application for an USB E1 adapter --- sam/applications/sam_e1/e1_ssc_tc.c | 234 ++++++++++ sam/applications/sam_e1/e1_ssc_tc.h | 5 + sam/applications/sam_e1/hardfault.c | 89 ++++ sam/applications/sam_e1/main.c | 503 +++++++++++++++++++++ sam/applications/sam_e1/main.h | 12 + .../sam4sd32c_sam4s_xplained_pro/conf_board.h | 56 +++ .../sam4sd32c_sam4s_xplained_pro/conf_clock.h | 104 +++++ .../sam4sd32c_sam4s_xplained_pro/conf_sleepmgr.h | 52 +++ .../sam4sd32c_sam4s_xplained_pro/conf_spi_master.h | 65 +++ .../conf_uart_serial.h | 66 +++ .../sam_e1/sam4sd32c_sam4s_xplained_pro/conf_usb.h | 114 +++++ .../sam4sd32c_sam4s_xplained_pro/gcc/Makefile | 52 +++ .../sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/asf.h | 122 +++++ .../sam4sd32c_sam4s_xplained_pro/gcc/config.mk | 202 +++++++++ .../sam4sd32c_sam4s_xplained_pro/low_power_board.c | 115 +++++ .../sam4sd32c_sam4s_xplained_pro/low_power_board.h | 116 +++++ 16 files changed, 1907 insertions(+) create mode 100644 sam/applications/sam_e1/e1_ssc_tc.c create mode 100644 sam/applications/sam_e1/e1_ssc_tc.h create mode 100644 sam/applications/sam_e1/hardfault.c create mode 100644 sam/applications/sam_e1/main.c create mode 100644 sam/applications/sam_e1/main.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_board.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_clock.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_sleepmgr.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_spi_master.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_uart_serial.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_usb.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/Makefile create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/asf.h create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/config.mk create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.c create mode 100644 sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.h diff --git a/sam/applications/sam_e1/e1_ssc_tc.c b/sam/applications/sam_e1/e1_ssc_tc.c new file mode 100644 index 00000000..672a84e4 --- /dev/null +++ b/sam/applications/sam_e1/e1_ssc_tc.c @@ -0,0 +1,234 @@ + + +#include +#include +#include "conf_board.h" + +/* enable Transmit support */ +#define TX_ENABLE + +static int g_ssc_num_overruns; +static Pdc* g_pdc; + + +/* 1024 bytes covers 32 frames of 32bytes (256bits) each. + * At frame rate of 8000 Hz, this means 1024 bytes represent 4ms */ +#define BUFFER_SIZE 1024 + +static uint8_t g_pdc_ssc_buffer0[BUFFER_SIZE]; +static pdc_packet_t g_pdc_ssc_rx_packet0 = { + .ul_addr = &g_pdc_ssc_buffer0, + .ul_size = BUFFER_SIZE/4, /* 32bit transfers, so 4 bytes per transfer */ +}; +static uint8_t g_pdc_ssc_buffer1[BUFFER_SIZE]; +static pdc_packet_t g_pdc_ssc_rx_packet1 = { + .ul_addr = &g_pdc_ssc_buffer1, + .ul_size = BUFFER_SIZE/4, /* 32bit transfers, so 4 bytes per transfer */ +}; + +static uint8_t g_pdc_ssc_buffer2[BUFFER_SIZE]; +static pdc_packet_t g_pdc_ssc_tx_packet = { + .ul_addr = &g_pdc_ssc_buffer2, + .ul_size = BUFFER_SIZE/4, /* 32bit transfers, so 4 bytes per transfer */ +}; + + + +/* We use one timer/counter block to generate an artificial frame signal from the + * received/recovered clock, which we then feed into the SSC for bit/octet-alignment */ + +#define ID_TC_ALIGN ID_TC4 /* TC4 == TC1 on instance 1 */ +#define TC_ALIGN TC1 /* instance 1 */ +#define TC_CHANNEL_ALIGN 1 /* TC1 on instance 1 */ + +void e1_tc_align_init() +{ + printf("%s\n\r", __func__); + sysclk_enable_peripheral_clock(ID_TC_ALIGN); + + //TC_CMR_EEVT_XC1 | /* external event is XC1 */ + //TC_CMR_AEEVT_CLEAR | /* clear TIOA on ext event */ + tc_init(TC_ALIGN, TC_CHANNEL_ALIGN, + TC_CMR_TCCLKS_XC0 | /* use XC0 as clock source */ + TC_CMR_WAVE | /* waveform mode */ + TC_CMR_WAVSEL_UP_RC | /* upward counting with trigger on RC compare */ + TC_CMR_ACPA_SET | /* set TIOA on RA compare */ + TC_CMR_BCPB_SET | /* set TIOB on RB compare */ + TC_CMR_ACPC_CLEAR | /* clear TIOA on RC compare */ + TC_CMR_BCPC_CLEAR /* clear TIOB on RC compare */ + ); + + /* Route TCLK0 to XC0 */ + tc_set_block_mode(TC_ALIGN, TC_BMR_TC0XC0S_TCLK0 | TC_BMR_TC1XC1S_TCLK1 | TC_BMR_TC2XC2S_TCLK2); + + /* one frame is 256 clock cycles */ + tc_write_rc(TC_ALIGN, TC_CHANNEL_ALIGN, 256); + /* use RA to shift position of rising edge of generated frame signal */ + tc_write_ra(TC_ALIGN, TC_CHANNEL_ALIGN, 16); + tc_write_rb(TC_ALIGN, TC_CHANNEL_ALIGN, 64); + + tc_start(TC_ALIGN, TC_CHANNEL_ALIGN); +} + +uint32_t e1_tc_align_read() +{ + return tc_read_cv(TC_ALIGN, TC_CHANNEL_ALIGN); +} + +/* Interrupt handler for SSC. Linker magic binds this function based on name (startup_sam4s.c) */ +void SSC_Handler(void) +{ + uint32_t status = ssc_get_status(SSC); + + if (status & SSC_SR_RXBUFF) { + //printf("R"); + pdc_rx_init(g_pdc, &g_pdc_ssc_rx_packet1, NULL); /* FIXME: swap buffers */ + } +#ifdef TX_ENABLE + if (status & SSC_SR_TXBUFE) { + pdc_tx_init(g_pdc, &g_pdc_ssc_tx_packet, NULL); + } +#endif + if (status & SSC_SR_OVRUN) { + g_ssc_num_overruns++; + } +} + +/* fill TX Buffer with (hopefully) valid TS0 idle pattern */ +static void fill_tx_buf(uint8_t *buf, unsigned int size) +{ + unsigned int i, j = 0; + const uint8_t ts0_pattern[] = { 0x1b, 0x40, 0x1b, 0x40, 0x1b, 0xc0, 0x1b, 0x40, + 0x1b, 0xc0, 0x9b, 0xc0, 0x9b, 0x40, 0x9b, 0x40 }; + + memset(buf, 0xff, size); + for (i = 0; i < size; i += 32) { + buf[i] = ts0_pattern[j]; + j = (j + 1) % sizeof(ts0_pattern); + } +} + +void e1_init_gpio() +{ + printf("%s\n\r", __func__); + + /* enable clock to peripherals */ + pmc_enable_periph_clk(ID_PIOA); + pmc_enable_periph_clk(ID_PIOC); + + /* LIU / SSC interface */ + pio_configure_pin(PIO_PA19_IDX, PIO_PERIPH_A); /* RK */ + pio_configure_pin(PIO_PA18_IDX, PIO_PERIPH_A); /* RD */ + pio_configure_pin(PIO_PA16_IDX, PIO_PERIPH_A); /* TK */ + pio_configure_pin(PIO_PA17_IDX, PIO_PERIPH_A); /* TD */ + + /* receive frame generation via TC */ + pio_configure_pin(PIO_PC25_IDX, PIO_PERIPH_B); /* TCKL3 */ + pio_configure_pin(PIO_PA20_IDX, PIO_PERIPH_A); /* RF */ + pio_configure_pin(PIO_PC26_IDX, PIO_PERIPH_B); /* TIOA4 */ + //pio_configure_pin(PIO_PC27_IDX, PIO_PERIPH_B); /* TIOB4 */ +} + +void e1_ssc_init() +{ + g_pdc = ssc_get_pdc_base(SSC); + printf("%s\n\r", __func__); + fill_tx_buf(g_pdc_ssc_buffer2, sizeof(g_pdc_ssc_buffer2)); + + sysclk_enable_peripheral_clock(ID_SSC); + + /* disable register write protect */ + ssc_set_writeprotect(SSC, 0); + /* no chip-internal loopback */ + ssc_set_normal_mode(SSC); + + static const clock_opt_t rx_clk = { + .ul_ckg = SSC_RCMR_CKG_CONTINUOUS, + .ul_cki = 0, //SSC_RCMR_CKI + .ul_cko = SSC_RCMR_CKO_NONE, + .ul_cks = SSC_RCMR_CKS_RK, + .ul_period = 0, + .ul_start_sel = SSC_RCMR_START_RF_RISING, + //.ul_start_sel = SSC_RCMR_START_CONTINUOUS, + .ul_sttdly = 0, + }; + static const data_frame_opt_t rx_opt = { + .ul_datlen = 32-1, /* 32 bit per word */ + .ul_datnb = 8-1, /* 8 words (=> 8*32=256 bits) */ + .ul_fsedge = SSC_RFMR_FSEDGE_POSITIVE, + .ul_fslen = 0, + .ul_fslen_ext = 0, + .ul_fsos = SSC_RFMR_FSOS_NONE, + .ul_msbf = SSC_RFMR_MSBF, + }; + + printf("ssc_set_receiver\n\r"); + ssc_set_receiver(SSC, &rx_clk, &rx_opt); + +#ifdef TX_ENABLE + static const clock_opt_t tx_clk = { + .ul_ckg = SSC_TCMR_CKG_CONTINUOUS, + .ul_cki = 0, //SSC_RCMR_CKI + .ul_cko = SSC_TCMR_CKO_NONE, + .ul_cks = SSC_TCMR_CKS_TK, + .ul_period = 0, + .ul_start_sel = SSC_TCMR_START_CONTINUOUS, + .ul_sttdly = 0, + }; + static const data_frame_opt_t tx_opt = { + .ul_datlen = 32-1, + .ul_datnb = 8-1, + .ul_fsedge = SSC_TFMR_FSEDGE_POSITIVE, + .ul_fslen = 0, + .ul_fslen_ext = 0, + .ul_fsos = SSC_TFMR_FSOS_NONE, + .ul_msbf = SSC_TFMR_MSBF, + }; + + printf("ssc_set_transmitter\n\r"); + ssc_set_transmitter(SSC, &tx_clk, &tx_opt); +#endif + + /* set up Peripheral DMA controller */ + //pdc_rx_init(g_pdc, &g_pdc_ssc_rx_packet0, &g_pdc_ssc_rx_packet1); + pdc_rx_init(g_pdc, &g_pdc_ssc_rx_packet0, NULL); +#ifdef TX_ENABLE + pdc_tx_init(g_pdc, &g_pdc_ssc_tx_packet, NULL); +#endif + pdc_enable_transfer(g_pdc, PERIPH_PTCR_RXTEN +#ifdef TX_ENABLE + | PERIPH_PTCR_TXTEN +#endif + ); + + printf("SSC NVIC interrupt enable\n\r"); + /* enable SSC interrupt at NVIC level */ + NVIC_DisableIRQ(SSC_IRQn); + NVIC_ClearPendingIRQ(SSC_IRQn); + NVIC_SetPriority(SSC_IRQn, 0); + NVIC_EnableIRQ(SSC_IRQn); + + /* enable SSC interrupts */ + ssc_enable_interrupt(SSC, SSC_IER_RXBUFF +#ifdef TX_ENABLE + | SSC_IER_TXBUFE +#endif + ); + + ssc_enable_rx(SSC); +#ifdef TX_ENABLE + ssc_enable_tx(SSC); +#endif +} + +#if 0 +static struct idt82 g_idt; + +static void idt_init() +{ + idt82_at91_init(&g_idt, SPI, ID_SPI, ); + idt82_init(&g_idt); + idt82_mode(&g_idt, IDT_MODE_E1); + idt82_termination(&g_idt, IDT_TERM_INT_120); +} +#endif diff --git a/sam/applications/sam_e1/e1_ssc_tc.h b/sam/applications/sam_e1/e1_ssc_tc.h new file mode 100644 index 00000000..ac573a7e --- /dev/null +++ b/sam/applications/sam_e1/e1_ssc_tc.h @@ -0,0 +1,5 @@ +#pragma once + +void e1_init_gpio(); +void e1_tc_align_init(); +void e1_ssc_init(); diff --git a/sam/applications/sam_e1/hardfault.c b/sam/applications/sam_e1/hardfault.c new file mode 100644 index 00000000..99523216 --- /dev/null +++ b/sam/applications/sam_e1/hardfault.c @@ -0,0 +1,89 @@ +#include + +/** + * \brief Default HardFault interrupt handler. + */ +struct hardfault_args { + unsigned long r0; + unsigned long r1; + unsigned long r2; + unsigned long r3; + unsigned long r12; + unsigned long lr; + unsigned long pc; + unsigned long psr; +}; + +void hard_fault_handler_c(struct hardfault_args *args) +{ + printf("\r\nHardFault\r\n"); + printf("R0=%08x, R1=%08x, R2=%08x, R3=%08x, R12=%08x\r\n", + args->r0, args->r1, args->r2, args->r3, args->r12); + printf("LR[R14]=%08x, PC[R15]=%08x, PSR=%08x\r\n", + args->lr, args->pc, args->psr); + printf("BFAR=%08x, CFSR=%08x, HFSR=%08x\r\n", + SCB->BFAR, SCB->CFSR, SCB->HFSR); + printf("DFSR=%08x, AFSR=%08x, SHCSR=%08x\r\n", + SCB->DFSR, SCB->CFSR, SCB->SHCSR); + + if (SCB->HFSR & 0x40000000) + printf("FORCED "); + if (SCB->HFSR & 0x00000002) + printf("VECTTBL "); + + uint32_t ufsr = SCB->CFSR >> 16; + if (ufsr & 0x0200) + printf("DIVBYZERO "); + if (ufsr & 0x0100) + printf("UNALIGNED "); + if (ufsr & 0x0008) + printf("NOCP "); + if (ufsr & 0x0004) + printf("INVPC "); + if (ufsr & 0x0002) + printf("INVSTATE "); + if (ufsr & 0x0001) + printf("UNDEFINSTR "); + + uint32_t bfsr = (SCB->CFSR >> 8) & 0xff; + if (bfsr & 0x80) + printf("BFARVALID "); + if (bfsr & 0x10) + printf("STKERR "); + if (bfsr & 0x08) + printf("UNSTKERR "); + if (bfsr & 0x04) + printf("IMPRECISERR "); + if (bfsr & 0x02) + printf("PRECISERR "); + if (bfsr & 0x01) + printf("IBUSERR "); + + uint32_t mmfsr = (SCB->CFSR & 0xff); + if (mmfsr & 0x80) + printf("MMARVALID "); + if (mmfsr & 0x10) + printf("MSTKERR "); + if (mmfsr & 0x08) + printf("MUNSTKERR "); + if (mmfsr & 0x02) + printf("DACCVIOL "); + if (mmfsr & 0x01) + printf("IACCVIOL "); + + while ( 1 ) ; +} + +__attribute__((naked)) +void HardFault_Handler( void ) +{ + __asm volatile( + ".syntax unified \n" + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + //" ldr r1, [r0, #24] \n" + " b hard_fault_handler_c\n" + ".syntax divided \n"); +} diff --git a/sam/applications/sam_e1/main.c b/sam/applications/sam_e1/main.c new file mode 100644 index 00000000..a9c56eb9 --- /dev/null +++ b/sam/applications/sam_e1/main.c @@ -0,0 +1,503 @@ +/** + * \file + * + * \brief Low Power Application. + * + * Copyright (c) 2012-2016 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +/** + * \mainpage Low Power Application + * + * \section Purpose + * + * This example shows all the different low power modes with several types + * of wake-up sources. And the consumption of the core in different power + * modes can be measured. + * + * \section Requirements + * + * This package can be used with SAM evaluation kits. + * + * \section Description + * + * The program will display a menu on console. It allows users to change the + * configuration and enter into a different power mode, and then measure the + * power consumption. + * + * For Eks, an amperemeter has to be plugged on the board instead of the + * VDDx jumper. + * + * Note that for better consumption measurement: + * - Run program out of flash without ICE connected. + * + * \section Usage + * + * -# Build the program and download it into the evaluation board. + * -# On the computer, open and configure a terminal application + * (e.g., HyperTerminal on Microsoft Windows) with these settings: + * - 115200 bauds + * - 8 bits of data + * - No parity + * - 1 stop bit + * - No flow control + * -# Start the application. + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include +#include "stdio_serial.h" +#include "conf_board.h" +#include "conf_clock.h" +#include "conf_uart_serial.h" +#include "conf_usb.h" +#include "low_power_board.h" +#include "e1_ssc_tc.h" + +#if !defined(PMC_PCK_PRES_CLK_1) +#define PMC_PCK_PRES_CLK_1 PMC_PCK_PRES(0) +#define PMC_PCK_PRES_CLK_2 PMC_PCK_PRES(1) +#define PMC_PCK_PRES_CLK_4 PMC_PCK_PRES(2) +#define PMC_PCK_PRES_CLK_8 PMC_PCK_PRES(3) +#define PMC_PCK_PRES_CLK_16 PMC_PCK_PRES(4) +#define PMC_PCK_PRES_CLK_32 PMC_PCK_PRES(5) +#define PMC_PCK_PRES_CLK_64 PMC_PCK_PRES(6) +#endif + +#define STRING_EOL "\r" +#define STRING_HEADER "-- Osmocom E1 Example --\r\n" \ + "-- "BOARD_NAME " --\r\n" \ + "-- Compiled: "__DATE__ " "__TIME__ " --"STRING_EOL + +#ifndef PLL_DEFAULT_MUL +#define PLL_DEFAULT_MUL 7 +#endif + +#ifndef PLL_DEFAULT_DIV +#define PLL_DEFAULT_DIV 1 +#endif + +#ifndef MCK_DEFAULT_DIV +#define MCK_DEFAULT_DIV PMC_MCKR_PRES_CLK_4 +#endif + +#ifndef example_switch_clock +#define example_switch_clock(a, b, c, d) \ + do { \ + pmc_enable_pllack(a, b, c); \ + pmc_switch_mck_to_pllack(d); \ + } while (0) +#endif + +#ifndef example_disable_pll +#define example_disable_pll() pmc_disable_pllack() +#endif + +#ifndef example_set_wakeup_from_wait_mode +#define example_set_wakeup_from_wait_mode() \ + pmc_set_fast_startup_input(WAKEUP_WAIT_INPUT_ID) +#endif + +#ifndef example_set_wakeup_from_backup_mode +#define example_set_wakeup_from_backup_mode() \ + supc_set_wakeup_inputs(SUPC, WAKEUP_BACKUP_INPUT_ID, \ + WAKEUP_BACKUP_INPUT_ID) +#endif + +/** Current MCK in Hz */ +uint32_t g_ul_current_mck; + +/** Button pressed flag */ +volatile uint32_t g_ul_button_pressed = 0; + +/** + * \brief Set default clock (MCK = 24MHz). + */ +static void set_default_working_clock(void) +{ +#if (SAMG) + /* Switch MCK to slow clock */ + pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_1); + + /* + * Configure PLL and switch clock. + * MCK = XTAL * (PLL_DEFAULT_MUL+1) / PLL_DEFAULT_DIV / MCK_DEFAULT_DIV + * = 24 MHz + */ + example_switch_clock(PLL_DEFAULT_MUL, PLL_COUNT, PLL_DEFAULT_DIV, + MCK_DEFAULT_DIV); +#else + /* Switch MCK to slow clock */ + pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_1); + + /* Switch mainck to external xtal */ + pmc_switch_mainck_to_xtal(0, BOARD_OSC_STARTUP_US); + + /* + * Configure PLL and switch clock. + * MCK = XTAL * (PLL_DEFAULT_MUL+1) / PLL_DEFAULT_DIV / MCK_DEFAULT_DIV + * = 24 MHz + */ + example_switch_clock(PLL_DEFAULT_MUL, PLL_COUNT, PLL_DEFAULT_DIV, + MCK_DEFAULT_DIV); + + /* Disable unused clock to save power */ + pmc_osc_disable_fastrc(); +#endif + + /* Save current clock */ +#if SAMG55 + g_ul_current_mck = 48000000; /* 48MHz */ +#else + g_ul_current_mck = 24000000; /* 24MHz */ +#endif +} + +/** + * Configure UART console. + */ +static void configure_console(void) +{ + const usart_serial_options_t uart_serial_options = { + .baudrate = CONF_UART_BAUDRATE, +#ifdef CONF_UART_CHAR_LENGTH + .charlength = CONF_UART_CHAR_LENGTH, +#endif + .paritytype = CONF_UART_PARITY, +#ifdef CONF_UART_STOP_BITS + .stopbits = CONF_UART_STOP_BITS, +#endif + }; + + /* Configure console UART. */ + sysclk_enable_peripheral_clock(CONSOLE_UART_ID); + pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART, + CONF_PINS_UART_FLAGS); + stdio_serial_init(CONF_UART, &uart_serial_options); +} + +/** + * Reconfigure UART console for changed MCK and baudrate. + */ +#if SAMG55 +static void reconfigure_console(uint32_t ul_mck, uint32_t ul_baudrate) +{ + sam_usart_opt_t uart_serial_options; + + uart_serial_options.baudrate = ul_baudrate, + uart_serial_options.char_length = CONF_UART_CHAR_LENGTH, + uart_serial_options.parity_type = US_MR_PAR_NO; + uart_serial_options.stop_bits = CONF_UART_STOP_BITS, + uart_serial_options.channel_mode= US_MR_CHMODE_NORMAL, + uart_serial_options.irda_filter = 0, + + /* Configure PMC */ + flexcom_enable(CONF_FLEXCOM); + flexcom_set_opmode(CONF_FLEXCOM, FLEXCOM_USART); + + /* Configure PIO */ + pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART, + CONF_PINS_UART_FLAGS); + + /* Configure UART */ + usart_init_rs232(CONF_UART, &uart_serial_options, ul_mck); + /* Enable the receiver and transmitter. */ + usart_enable_tx(CONF_UART); + usart_enable_rx(CONF_UART); +} +#else +static void reconfigure_console(uint32_t ul_mck, uint32_t ul_baudrate) +{ + const sam_uart_opt_t uart_console_settings = + { ul_mck, ul_baudrate, UART_MR_PAR_NO }; + + /* Configure PMC */ + pmc_enable_periph_clk(CONSOLE_UART_ID); + + /* Configure PIO */ + pio_configure_pin_group(CONF_UART_PIO, CONF_PINS_UART, + CONF_PINS_UART_FLAGS); + + /* Configure UART */ + uart_init(CONF_UART, &uart_console_settings); +} +#endif + +/** + * \brief Initialize the chip for low power test. + */ +static void init_chip(void) +{ +#if SAMG55 + /* Wait for the transmission done before changing clock */ + while (!usart_is_tx_empty(CONSOLE_UART)) { + } +#else + /* Wait for the transmission done before changing clock */ + while (!uart_is_tx_empty(CONSOLE_UART)) { + } +#endif + + /* Disable all the peripheral clocks */ + pmc_disable_all_periph_clk(); + + /* Disable brownout detector */ + supc_disable_brownout_detector(SUPC); + + /* Initialize the specific board */ + //init_specific_board(); +} + +/** + * \brief Handler for button interrupt. + * + * \note This interrupt is for waking up from sleep mode or exiting from active + * mode. + */ +static void button_handler(uint32_t ul_id, uint32_t ul_mask) +{ + if (PIN_PUSHBUTTON_WAKEUP_ID == ul_id && + PIN_PUSHBUTTON_WAKEUP_MASK == ul_mask) { + g_ul_button_pressed = 1; + } +} + +/** + * \brief Configure the push button. + * + * Configure the PIO as inputs and generate corresponding interrupt when + * pressed or released. + */ +static void configure_button(void) +{ + /* Adjust PIO debounce filter parameters, using 10 Hz filter. */ + pio_set_debounce_filter(PIN_PUSHBUTTON_WAKEUP_PIO, + PIN_PUSHBUTTON_WAKEUP_MASK, 10); + + /* Initialize PIO interrupt handlers, see PIO definition in board.h. */ + pio_handler_set(PIN_PUSHBUTTON_WAKEUP_PIO, PIN_PUSHBUTTON_WAKEUP_ID, + PIN_PUSHBUTTON_WAKEUP_MASK, PIN_PUSHBUTTON_WAKEUP_ATTR, + button_handler); + + /* Enable PIO controller IRQs. */ + NVIC_EnableIRQ((IRQn_Type)PIN_PUSHBUTTON_WAKEUP_ID); + + /* Enable PIO line interrupts. */ + pio_enable_interrupt(PIN_PUSHBUTTON_WAKEUP_PIO, + PIN_PUSHBUTTON_WAKEUP_MASK); +} + +/** + * \brief Display test core menu. + */ +static void display_menu_core(void) +{ + printf("\n\r"); + printf("===============================================\n\r"); + printf("Menu: press a key to continue.\n\r"); + printf("===============================================\n\r"); + printf("Configure:\n\r"); + printf(" F : 128-bit flash access\n\r"); + printf(" G : 64-bit flash access\n\r"); + printf("Mode:\n\r"); + printf(" A : Active Mode\n\r"); + printf(" S : Sleep Mode\n\r"); + printf(" W : Wait Mode\n\r"); +#if (!(SAMG51 || SAMG53 || SAMG54)) + printf(" B : Backup Mode(Entered %d times).\n\r", (int)gpbr_read(GPBR0)); +#endif + printf("Quit:\n\r"); + printf(" Q : Quit test.\n\r"); + + printf("\n\r"); + printf("-----------------------------------------------\n\r"); + printf("Current configuration:\n\r"); + printf(" CPU Clock : MCK=%d Hz\n\r", (int)g_ul_current_mck); + if ((efc_get_flash_access_mode(EFC) & EEFC_FMR_FAM) == EEFC_FMR_FAM) { + printf(" Flash access mode : 64-bit\n\r"); + } else { + printf(" Flash access mode : 128-bit\n\r"); + } + + printf("-----------------------------------------------\n\r"); + printf("\n\r"); +} + +static void dump_all_tc_cv() +{ + int i; + for (i = 0; i < 3; i++) + printf("TC0/%d: %u\n\r", i, tc_read_cv(TC0, i)); + for (i = 0; i < 3; i++) + printf("TC1/%d: %u\n\r", i, tc_read_cv(TC1, i)); +} + +/** + * \brief Test Core consumption. + */ +static void test_core(void) +{ + uint8_t uc_key = 0; + + while (1) { + /* Display menu */ + display_menu_core(); + + /* Read a key from console */ + scanf("%c", (char *)&uc_key); + + switch (uc_key) { + case 't': + dump_all_tc_cv(); + break; + /* Configuration */ + case 'f': + case 'F': + efc_set_flash_access_mode(EFC, 0); /* 128-bit */ + break; + + case 'g': + case 'G': + efc_set_flash_access_mode(EFC, EEFC_FMR_FAM); /* 64-bit */ + break; + + /* Quit test */ + case 'q': + case 'Q': + goto test_core_end; + + default: + puts("This menu does not exist !\r"); + break; + } /* Switch */ + } + +test_core_end: + puts(" Exit from core consumption test mode.\r"); +} + +static void main_vbus_action(bool b_high) +{ + if (b_high) + udc_attach(); + else + udc_detach(); +} + +/** + * \brief Low power application entry point. + * + * \return Unused (ANSI-C compatibility). + */ +int main(void) +{ + /* Initialize the SAM system */ + sysclk_init(); + g_ul_current_mck = sysclk_get_cpu_hz(); + board_init(); + + /* Initialize the console uart */ + configure_console(); + + /* Output example information */ + puts(STRING_HEADER); + + /* Initialize the chip for the power consumption test */ + init_chip(); + + /* Set default clock and re-configure UART */ + set_default_working_clock(); + reconfigure_console(g_ul_current_mck, CONF_UART_BAUDRATE); + + udc_start(); + if (!udc_include_vbus_monitoring()) + main_vbus_action(true); + + e1_init_gpio(); + e1_tc_align_init(); + e1_ssc_init(); + + /* Test core consumption */ + test_core(); + + while (1) { + } +} + + +/* enable the interface */ +bool usb_vendor_e1_enable(void) +{ + printf("%s\n\r", __func__); + return true; +} + +/* disable the interface */ +void usb_vendor_e1_disable(void) +{ + printf("%s\n\r", __func__); +} + +/* handle a control request directed to an interface */ +//bool usb_vendor_e1_setup(void) { } + + +/* enable the interface */ +bool main_cdc_enable(uint8_t port) +{ + printf("%s\n\r", __func__); + return true; +} + +/* disable the interface */ +void main_cdc_disable(uint8_t port) +{ + printf("%s\n\r", __func__); +} + +void main_cdc_rx_notify(uint8_t port) +{ + printf("%s\n\r", __func__); +} + +void main_cdc_set_dtr(uint8_t port, bool b_enable) +{ + printf("%s\n\r", __func__); +} diff --git a/sam/applications/sam_e1/main.h b/sam/applications/sam_e1/main.h new file mode 100644 index 00000000..13687ad9 --- /dev/null +++ b/sam/applications/sam_e1/main.h @@ -0,0 +1,12 @@ +#pragma once + +#include +#include "conf_usb.h" + +bool usb_vendor_e1_enable(void); +void usb_vendor_e1_disable(void); + +bool main_cdc_enable(uint8_t port); +void main_cdc_disable(uint8_t port); +void main_cdc_rx_notify(uint8_t port); +void main_cdc_set_dtr(uint8_t port, bool b_enable); diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_board.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_board.h new file mode 100644 index 00000000..6a2ae8a9 --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_board.h @@ -0,0 +1,56 @@ +/** + * \file + * + * \brief Board configuration. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_BOARD_H_INCLUDED +#define CONF_BOARD_H_INCLUDED + +/** Usart Hw ID used by the console (UART1). */ +#define CONSOLE_UART_ID ID_UART1 + +/* Configure UART1 pins */ +#define CONF_BOARD_UART_CONSOLE + +#endif /* CONF_BOARD_H_INCLUDED */ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_clock.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_clock.h new file mode 100644 index 00000000..1d85137a --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_clock.h @@ -0,0 +1,104 @@ +/** + * \file + * + * \brief SAM4S clock configuration. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_CLOCK_H_INCLUDED +#define CONF_CLOCK_H_INCLUDED + +// ===== System Clock (MCK) Source Options +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_RC +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_XTAL +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_SLCK_BYPASS +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_8M_RC +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_12M_RC +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_XTAL +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_BYPASS +#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK +//#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLBCK + +// ===== System Clock (MCK) Prescaler Options (Fmck = Fsys / (SYSCLK_PRES)) +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1 +#define CONFIG_SYSCLK_PRES SYSCLK_PRES_2 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_4 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_8 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_16 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_32 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_64 +//#define CONFIG_SYSCLK_PRES SYSCLK_PRES_3 + +// ===== PLL0 (A) Options (Fpll = (Fclk * PLL_mul) / PLL_div) +// Use mul and div effective values here. +#define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL +#define CONFIG_PLL0_MUL 20 +#define CONFIG_PLL0_DIV 1 + +// ===== PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div) +// Use mul and div effective values here. +#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL +#define CONFIG_PLL1_MUL 16 +#define CONFIG_PLL1_DIV 2 + +// ===== USB Clock Source Options (Fusb = FpllX / USB_div) +// Use div effective value here. +//#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL0 +#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 +#define CONFIG_USBCLK_DIV 2 + +// ===== Target frequency (System clock) +// - XTAL frequency: 12MHz +// - System clock source: PLLA +// - System clock prescaler: 2 (divided by 2) +// - PLLA source: XTAL +// - PLLA output: XTAL * 20 / 1 +// - System clock: 12 * 20 / 1 / 2 = 120MHz +// ===== Target frequency (USB Clock) +// - USB clock source: PLLB +// - USB clock divider: 2 (divided by 2) +// - PLLB output: XTAL * 16 / 2 +// - USB clock: 12 * 16 / 2 / 2 = 48MHz + + +#endif /* CONF_CLOCK_H_INCLUDED */ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_sleepmgr.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_sleepmgr.h new file mode 100644 index 00000000..a6f46cae --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_sleepmgr.h @@ -0,0 +1,52 @@ +/** + * \file + * + * \brief Sleep manager configuration + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_SLEEPMGR_H +#define CONF_SLEEPMGR_H + +#define CONFIG_SLEEPMGR_ENABLE + +#endif /* CONF_SLEEPMGR_H */ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_spi_master.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_spi_master.h new file mode 100644 index 00000000..0f9bf489 --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_spi_master.h @@ -0,0 +1,65 @@ +/** + * \file + * + * \brief SPI Master configuration. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_SPI_MASTER_H_INCLUDED +#define CONF_SPI_MASTER_H_INCLUDED + +/* Possibility to change low-level configurations here */ + +//! Default Config Spi Master Delay BCS +#define CONFIG_SPI_MASTER_DELAY_BCS 0 + +//! Default Config Spi Master Bits per Transfer Definition +#define CONFIG_SPI_MASTER_BITS_PER_TRANSFER 8 + +//! Default Config Spi Master Delay BCT +#define CONFIG_SPI_MASTER_DELAY_BCT 0 + +//! Default Config Spi Master Delay BS +#define CONFIG_SPI_MASTER_DELAY_BS 0 + +//! Default Config Spi Master Dummy Field +#define CONFIG_SPI_MASTER_DUMMY 0xFF + +#endif /* CONF_SPI_MASTER_H_INCLUDED */ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_uart_serial.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_uart_serial.h new file mode 100644 index 00000000..e265a13e --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_uart_serial.h @@ -0,0 +1,66 @@ +/** + * \file + * + * \brief Serial USART service configuration. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef CONF_USART_SERIAL_H +#define CONF_USART_SERIAL_H + +/** UART Interface */ +#define CONF_UART CONSOLE_UART +/** Baudrate setting */ +#define CONF_UART_BAUDRATE 115200 +/** Parity setting */ +#define CONF_UART_PARITY US_MR_PAR_NO + +/* Configure UART pins PIO */ +#define CONF_UART_PIO PINS_UART1_PIO + +/* Configure UART pins */ +#define CONF_PINS_UART PINS_UART1 + +/* Configure UART pins flags */ +#define CONF_PINS_UART_FLAGS PINS_UART1_FLAGS + +#endif/* CONF_USART_SERIAL_H_INCLUDED */ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_usb.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_usb.h new file mode 100644 index 00000000..d2efa366 --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/conf_usb.h @@ -0,0 +1,114 @@ +#ifndef _CONF_USB_H_ +#define _CONF_USB_H_ + +#include "compiler.h" + +#define USB_DEVICE_EP_CTRL_SIZE 8 +#define USB_DEVICE_NB_INTERFACE 3 +#define USB_DEVICE_MAX_EP 7 + + +#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) +#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) +#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) + +#define UDI_VENDOR_EP_ISO_IN (4 | USB_EP_DIR_IN) +#define UDI_VENDOR_EP_ISO_OUT (5 | USB_EP_DIR_OUT) +//#define UDI_VENDOR_EP_ISO_IN_FB (6 | USB_EP_DIR_OUT) + +#define UDI_COMPOSITE_DESC_T \ + udi_cdc_comm_desc_t udi_cdc_comm; \ + udi_cdc_data_desc_t udi_cdc_data; \ + udi_vendor_desc_t udi_vendor; + + +#define UDI_COMPOSITE_DESC_FS \ + .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ + .udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \ + .udi_vendor = UDI_VENDOR_DESC_FS, + +#define UDI_COMPOSITE_API \ + &udi_api_cdc_comm, \ + &udi_api_cdc_data, \ + &udi_api_vendor, + + + +/* USB Device Configuration */ + +//! Device definition (mandatory) +#define USB_DEVICE_VENDOR_ID USB_VID_ATMEL +#define USB_DEVICE_PRODUCT_ID USB_PID_ATMEL_ASF_MSC +#define USB_DEVICE_MAJOR_VERSION 1 +#define USB_DEVICE_MINOR_VERSION 0 +#define USB_DEVICE_POWER 200 // Consumption on Vbus line (mA) +#define USB_DEVICE_ATTR \ + (USB_CONFIG_ATTR_BUS_POWERED) + +//! USB Device string definitions (Optional) +#define USB_DEVICE_MANUFACTURE_NAME "sysmocom - s.f.m.c. GmbH" +#define USB_DEVICE_PRODUCT_NAME "osmo-e1-interface" +#define USB_DEVICE_SERIAL_NAME "2342" + +/* USB Device Callbacks definitions (Optional) */ +#define UDC_VBUS_EVENT(b_vbus_high) +#define UDC_SOF_EVENT() +#define UDC_SUSPEND_EVENT() +#define UDC_RESUME_EVENT() +//! When a extra string descriptor must be supported +//! other than manufacturer, product and serial string +// #define UDC_GET_EXTRA_STRING() + + + + + +/* USB Interface Configuration (CDC) */ + +#define UDI_CDC_PORT_NB 1 +#define UDI_CDC_ENABLE_EXT(port) main_cdc_enable(port) +#define UDI_CDC_DISABLE_EXT(port) main_cdc_disable(port) +#define UDI_CDC_RX_NOTIFY(port) main_cdc_rx_notify(port) +#define UDI_CDC_TX_EMPTY_NOTIFY(port) +#define UDI_CDC_SET_CODING_EXT(port,cfg) +#define UDI_CDC_SET_DTR_EXT(port,set) main_cdc_set_dtr(port,set) +#define UDI_CDC_SET_RTS_EXT(port,set) + +#define UDI_CDC_DEFAULT_RATE 115200 +#define UDI_CDC_DEFAULT_STOPBITS 1 +#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE +#define UDI_CDC_DEFAULT_DATABITS 8 + +//#define UDI_CDC_IAD_STRING_ID 4 + +#define UDI_CDC_COMM_IFACE_NUMBER_0 0 +#define UDI_CDC_DATA_IFACE_NUMBER_0 1 + + + + + +/* USB Interface Configuration (Vendor) */ + +#define UDI_VENDOR_ENABLE_EXT() usb_vendor_e1_enable() +#define UDI_VENDOR_DISABLE_EXT() usb_vendor_e1_disable() +#define UDI_VENDOR_SETUP_IN_RECEIVED() false +#define UDI_VENDOR_SETUP_OUT_RECEIVED() false + + +#define UDI_VENDOR_EPS_SIZE_ISO_FS 256 +#define UDI_VENDOR_EPS_SIZE_INT_FS 0 +#define UDI_VENDOR_EPS_SIZE_BULK_FS 0 +#define UDI_VENDOR_IFACE_NUMBER 2 + + +/* USB Device Driver Configuration */ + + +//! The includes of classes and other headers must be done at the end of this file to avoid compile error +#include "udi_cdc.h" +#include "udi_cdc.h" +#include "udi_vendor.h" +#include "main.h" + +#endif // _CONF_USB_H_ diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/Makefile b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/Makefile new file mode 100644 index 00000000..036888b1 --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/Makefile @@ -0,0 +1,52 @@ +# List of available make goals: +# +# all Default target, builds the project +# clean Clean up the project +# rebuild Rebuild the project +# +# +# doc Build the documentation +# cleandoc Clean up the documentation +# rebuilddoc Rebuild the documentation +# +# Copyright (c) 2011 Atmel Corporation. All rights reserved. +# +# \asf_license_start +# +# \page License +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. The name of Atmel may not be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# 4. This software may only be redistributed and used in connection with an +# Atmel microcontroller product. +# +# THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED +# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE +# EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# \asf_license_stop +# + +# Include the common Makefile, which will also include the project specific +# config.mk file. +MAKEFILE_PATH = ../../../../../sam/utils/make/Makefile.sam.in +include $(MAKEFILE_PATH) diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/asf.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/asf.h new file mode 100644 index 00000000..5135834b --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/asf.h @@ -0,0 +1,122 @@ +/** + * \file + * + * \brief Autogenerated API include file for the Atmel Software Framework (ASF) + * + * Copyright (c) 2012 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ + +#ifndef ASF_H +#define ASF_H + +/* + * This file includes all API header files for the selected drivers from ASF. + * Note: There might be duplicate includes required by more than one driver. + * + * The file is automatically generated and will be re-written when + * running the ASF driver selector tool. Any changes will be discarded. + */ + +// From module: ADC - Analog-to-digital Converter +#include + +// From module: Common SAM compiler driver +#include +#include + +// From module: EEFC - Enhanced Embedded Flash Controller +#include + +// From module: GPBR - General Purpose Backup Register +#include + +// From module: GPIO - General purpose Input/Output +#include + +// From module: Generic board support +#include + +// From module: IOPORT - General purpose I/O service +#include + +// From module: Interrupt management - SAM implementation +#include + +// From module: PIO - Parallel Input/Output Controller +#include + +// From module: PMC - Power Management Controller +#include +#include + +// From module: Part identification macros +#include + +// From module: SAM4S Xplained Pro LED support enabled +#include + +// From module: SUPC - Supply Controller +#include + +// From module: Standard serial I/O (stdio) - SAM implementation +#include + +// From module: System Clock Control - SAM4S implementation +#include + +// From module: UART - Univ. Async Rec/Trans +#include + +// From module: USART - Serial interface - SAM implementation for devices with both UART and USART +#include + +// From module: USART - Univ. Syn Async Rec/Trans +#include + +// From module: WDT - Watchdog Timer +#include + +// From module: pio_handler support enabled +#include + +#include +#include +#include +#include + +#endif // ASF_H diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/config.mk b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/config.mk new file mode 100644 index 00000000..8a92ec7e --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc/config.mk @@ -0,0 +1,202 @@ +# +# Copyright (c) 2011 Atmel Corporation. All rights reserved. +# +# \asf_license_start +# +# \page License +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. The name of Atmel may not be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# 4. This software may only be redistributed and used in connection with an +# Atmel microcontroller product. +# +# THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED +# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE +# EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +# \asf_license_stop +# + +# Path to top level ASF directory relative to this project directory. +PRJ_PATH = ../../../../.. + +# Target CPU architecture: cortex-m3, cortex-m4 +ARCH = cortex-m4 + +# Target part: none, sam3n4 or sam4l4aa +PART = sam4sd32c + +# Application target name. Given with suffix .a for library and .elf for a +# standalone application. +TARGET_FLASH = sam_e1.elf +TARGET_SRAM = sam_e1.elf + +# List of C source files. +CSRCS = \ + common/services/clock/sam4s/sysclk.c \ + common/services/serial/usart_serial.c \ + common/services/sleepmgr/sam/sleepmgr.c \ + common/services/spi/sam_spi/spi_master.c \ + common/services/usb/udc/udc.c \ + common/services/usb/class/cdc/device/udi_cdc.c \ + common/services/usb/class/composite/device/udi_composite_desc.c \ + common/services/usb/class/vendor/device/udi_vendor.c \ + common/utils/interrupt/interrupt_sam_nvic.c \ + common/utils/stdio/read.c \ + common/utils/stdio/write.c \ + sam/applications/sam_e1/main.c \ + sam/applications/sam_e1/e1_ssc_tc.c \ + sam/applications/sam_e1/hardfault.c \ + sam/boards/sam4s_xplained_pro/init.c \ + sam/drivers/adc/adc.c \ + sam/drivers/adc/adc_sam3u.c \ + sam/drivers/efc/efc.c \ + sam/drivers/matrix/matrix.c \ + sam/drivers/gpbr/gpbr.c \ + sam/drivers/pdc/pdc.c \ + sam/drivers/pio/pio.c \ + sam/drivers/pio/pio_handler.c \ + sam/drivers/pmc/pmc.c \ + sam/drivers/pmc/sleep.c \ + sam/drivers/spi/spi.c \ + sam/drivers/ssc/ssc.c \ + sam/drivers/supc/supc.c \ + sam/drivers/tc/tc.c \ + sam/drivers/uart/uart.c \ + sam/drivers/udp/udp_device.c \ + sam/drivers/usart/usart.c \ + sam/drivers/wdt/wdt.c \ + sam/utils/cmsis/sam4s/source/templates/gcc/startup_sam4s.c \ + sam/utils/cmsis/sam4s/source/templates/system_sam4s.c \ + sam/utils/syscalls/gcc/syscalls.c + +# List of assembler source files. +ASSRCS = + +# List of include paths. +INC_PATH = \ + common/boards \ + common/services/clock \ + common/services/gpio \ + common/services/ioport \ + common/services/serial \ + common/services/serial/sam_uart \ + common/services/sleepmgr \ + common/services/spi \ + common/services/spi/sam_spi \ + common/services/usb \ + common/services/usb/udc \ + common/services/usb/class/cdc \ + common/services/usb/class/cdc/device \ + common/services/usb/class/composite/device \ + common/services/usb/class/vendor \ + common/services/usb/class/vendor/device \ + common/utils \ + common/utils/stdio/stdio_serial \ + sam/applications/sam_e1 \ + sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro \ + sam/boards \ + sam/boards/sam4s_xplained_pro \ + sam/drivers/adc \ + sam/drivers/efc \ + sam/drivers/gpbr \ + sam/drivers/pdc \ + sam/drivers/pio \ + sam/drivers/pmc \ + sam/drivers/spi \ + sam/drivers/ssc \ + sam/drivers/supc \ + sam/drivers/tc \ + sam/drivers/uart \ + sam/drivers/udp \ + sam/drivers/usart \ + sam/drivers/wdt \ + sam/utils \ + sam/utils/cmsis/sam4s/include \ + sam/utils/cmsis/sam4s/source/templates \ + sam/utils/header_files \ + sam/utils/preprocessor \ + thirdparty/CMSIS/Include \ + thirdparty/CMSIS/Lib/GCC \ + sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/gcc + +# Additional search paths for libraries. +LIB_PATH = \ + thirdparty/CMSIS/Lib/GCC + +# List of libraries to use during linking. +LIBS = \ + arm_cortexM4l_math \ + m + +# Path relative to top level directory pointing to a linker script. +LINKER_SCRIPT_FLASH = sam/utils/linker_scripts/sam4s/sam4sd32/gcc/flash.ld +LINKER_SCRIPT_SRAM = sam/utils/linker_scripts/sam4s/sam4sd32/gcc/sram.ld + +# Path relative to top level directory pointing to a linker script. +DEBUG_SCRIPT_FLASH = sam/boards/sam4s_xplained_pro/debug_scripts/gcc/sam4s_xplained_pro_flash.gdb +DEBUG_SCRIPT_SRAM = sam/boards/sam4s_xplained_pro/debug_scripts/gcc/sam4s_xplained_pro_sram.gdb + +# Project type parameter: all, sram or flash +PROJECT_TYPE = flash + +# Additional options for debugging. By default the common Makefile.in will +# add -g3. +DBGFLAGS = + +# Application optimization used during compilation and linking: +# -O0, -O1, -O2, -O3 or -Os +OPTIMIZATION = -O1 + +# Extra flags to use when archiving. +ARFLAGS = + +# Extra flags to use when assembling. +ASFLAGS = + +# Extra flags to use when compiling. +CFLAGS = + +# Extra flags to use when preprocessing. +# +# Preprocessor symbol definitions +# To add a definition use the format "-D name[=definition]". +# To cancel a definition use the format "-U name". +# +# The most relevant symbols to define for the preprocessor are: +# BOARD Target board in use, see boards/board.h for a list. +# EXT_BOARD Optional extension board in use, see boards/board.h for a list. +CPPFLAGS = \ + -D ACCESS_USB_ENABLED \ + -D ARM_MATH_CM4=true \ + -D BOARD=SAM4S_XPLAINED_PRO \ + -D UDD_ENABLE \ + -D __SAM4SD32C__ \ + -D printf=iprintf \ + -D scanf=iscanf + +# Extra flags to use when linking +LDFLAGS = \ + +# Pre- and post-build commands +PREBUILD_CMD = +POSTBUILD_CMD = diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.c b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.c new file mode 100644 index 00000000..abf4aa0a --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.c @@ -0,0 +1,115 @@ +/** + * \file + * + * \brief Board specific code for low power example. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#include "board.h" +#include "pio.h" +#include "pio_handler.h" +#include "pmc.h" +#include "adc.h" +#include "low_power_board.h" + +/** IRQ priority for PIO (The lower the value, the greater the priority) */ +#define IRQ_PRIOR_PIO 0 + +/** Clock list from fast RC */ +uint32_t g_fastrc_clock_list[][3] = { + /* MCK, FastRC, Prescaler */ + {125000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_32}, + {250000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_16}, + {500000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_8}, + {1000000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_4}, + {2000000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_2}, + {4000000, CKGR_MOR_MOSCRCF_4_MHz, PMC_MCKR_PRES_CLK_1}, + {8000000, CKGR_MOR_MOSCRCF_8_MHz, PMC_MCKR_PRES_CLK_1}, + {12000000, CKGR_MOR_MOSCRCF_12_MHz, PMC_MCKR_PRES_CLK_1} +}; + +/** Clock list from PLL */ +uint32_t g_pll_clock_list[][4] = { + /* MCK, MUL, DIV, PRES */ + /* MCK = 12000000 * (7+1) / 1 / 4 = 24 MHz */ + {24000000, 7, 1, PMC_MCKR_PRES_CLK_4}, + /* MCK = 12000000 * (7+1) / 1 / 3 = 32 MHz */ + {32000000, 7, 1, PMC_MCKR_PRES_CLK_3}, + /* MCK = 12000000 * (7+1) / 1 / 2 = 48 MHz */ + {48000000, 7, 1, PMC_MCKR_PRES_CLK_2}, + /* MCK = 12000000 * (31+1) / 3 / 2 = 64 MHz */ + {64000000, 31, 3, PMC_MCKR_PRES_CLK_2}, + /* MCK = 12000000 * (13+1) / 1 / 2 = 84 MHz */ + {84000000, 13, 1, PMC_MCKR_PRES_CLK_2}, + /* MCK = 12000000 * (24+1) / 1 / 3 = 100 MHz */ + {100000000, 24, 1, PMC_MCKR_PRES_CLK_3}, + /* MCK = 12000000 * (19+1) / 1 / 2 = 120 MHz */ + {120000000, 19, 1, PMC_MCKR_PRES_CLK_2} +}; + +/** + * \brief Initialize SAM4 Xplained Pro board for low power test. + */ +void init_specific_board(void) +{ +#if 0 + /* Configure all PIOs as inputs to save power */ + pio_set_input(PIOA, 0xFFFFFFFF, PIO_PULLUP); + pio_set_input(PIOB, 0xFFFFFFFF, PIO_PULLUP); + pio_set_input(PIOC, 0xFFFFFFFF, PIO_PULLUP); + + /* Disable USB Clock */ + pmc_disable_udpck(); +#endif + /* Disable PIO pull-up for PB10(USB_DDM), PB11(USB_DDP) */ + pio_pull_up(PIOB, (0x3 << 10), 0); + /* Disable PIO pull-up for PC21(USB_CNX) */ + pio_pull_up(PIOC, (0x1 << 21), 0); +#if 0 + /* Initialize ADC pin as ADC input mode to save power */ + adc_enable_channel(ADC, ADC_CHANNEL_4); + + /* Enable the PMC clocks of push button for wakeup */ + pmc_enable_periph_clk(ID_PIOA); + pio_handler_set_priority(PIOA, PIOA_IRQn, IRQ_PRIOR_PIO); +#endif +} diff --git a/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.h b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.h new file mode 100644 index 00000000..b86509ff --- /dev/null +++ b/sam/applications/sam_e1/sam4sd32c_sam4s_xplained_pro/low_power_board.h @@ -0,0 +1,116 @@ +/** + * \file + * + * \brief Board specific definition for low power example. + * + * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved. + * + * \asf_license_start + * + * \page License + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of Atmel may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * 4. This software may only be redistributed and used in connection with an + * Atmel microcontroller product. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit Atmel Support + */ + +#ifndef LOW_POWER_BOARD_H_INCLUDED +#define LOW_POWER_BOARD_H_INCLUDED + +/** + * Push button definitions for sleep mode and active mode + * @{ + */ +#define PIN_PUSHBUTTON_WAKEUP_PIO PIN_PUSHBUTTON_0_PIO +#define PIN_PUSHBUTTON_WAKEUP_MASK PIN_PUSHBUTTON_0_MASK +#define PIN_PUSHBUTTON_WAKEUP_ID PIN_PUSHBUTTON_0_ID +#define PIN_PUSHBUTTON_WAKEUP_ATTR PIN_PUSHBUTTON_0_ATTR +/** @} */ + +/** Wakeup pin for wait mode: WKUP2 pin (SW0) */ +#define WAKEUP_WAIT_INPUT_ID (1u << 2) +/** Wakeup pin for backup mode: WKUP2 pin (SW0) */ +#define WAKEUP_BACKUP_INPUT_ID (1u << 2) + +/** Hint message for active mode */ +#define STRING_ACTIVE \ + "Enter into active mode.\n\r" \ + "- Press SW0 button to go out.\n\r" + +/** Hint message for sleep mode */ +#define STRING_SLEEP \ + "Enter into sleep mode.\n\r" \ + "- Press SW0 button to wake up.\n\r" + +/** Hint message for wait mode */ +#define STRING_WAIT \ + "Enter into wait mode.\n\r" \ + "- Switch to 4MHz Fast RC oscillator, PLL stopped.\n\r" \ + "- Press SW0 button to wake up.\n\r" + +/** Hint message for backup mode */ +#define STRING_BACKUP \ + "Enter into backup mode.\n\r" \ + "- Press SW0 button to wake up.\n\r" + +#define CLOCK_LIST_MENU \ + "\n\rSelect one of the following clock configurations:\n\r" \ + " 1: 125KHz from Fast RC\n\r" \ + " 2: 250KHz from Fast RC\n\r" \ + " 3: 500KHz from Fast RC\n\r" \ + " 4: 1MHz from Fast RC\n\r" \ + " 5: 2MHz from Fast RC\n\r" \ + " 6: 4MHz from Fast RC\n\r" \ + " 7: 8MHz from Fast RC\n\r" \ + " 8: 12MHz from Fast RC\n\r" \ + " a: 24MHz from PLL clock\n\r" \ + " b: 32MHz from PLL clock\n\r" \ + " c: 48MHz from PLL clock\n\r" \ + " d: 64MHz from PLL clock\n\r" \ + " e: 84MHz from PLL clock\n\r" \ + " f: 100MHz from PLL clock\n\r" \ + " g: 120MHz from PLL clock\n\r" \ + +#define MIN_CLOCK_FAST_RC_ITEM '1' +#define MAX_CLOCK_FAST_RC_ITEM '8' +#define MIN_CLOCK_PLL_ITEM 'a' +#define MAX_CLOCK_PLL_ITEM 'g' + +#define EFC EFC0 + +extern uint32_t g_fastrc_clock_list[][3]; +extern uint32_t g_pll_clock_list[][4]; + +void init_specific_board(void); + +#endif /* LOW_POWER_BOARD_H_INCLUDED */ -- cgit v1.2.3