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+/**
+ * \file
+ *
+ * \brief SAM L22 Clock configuration
+ *
+ * Copyright (C) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ * Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
+ */
+#include <clock.h>
+
+#ifndef CONF_CLOCKS_H_INCLUDED
+# define CONF_CLOCKS_H_INCLUDED
+
+/* System clock bus configuration */
+# define CONF_CLOCK_FLASH_WAIT_STATES 0
+# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+# define CONF_CLOCK_BACKUP_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+
+/* SYSTEM_CLOCK_SOURCE_OSC16M configuration - Internal 16MHz oscillator */
+# define CONF_CLOCK_OSC16M_FREQ_SEL SYSTEM_OSC16M_4M
+# define CONF_CLOCK_OSC16M_ON_DEMAND true
+# define CONF_CLOCK_OSC16M_RUN_IN_STANDBY false
+
+/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
+# define CONF_CLOCK_XOSC_ENABLE false
+# define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
+# define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY 12000000UL
+# define CONF_CLOCK_XOSC_STARTUP_TIME SYSTEM_XOSC_STARTUP_32768
+# define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL true
+# define CONF_CLOCK_XOSC_ON_DEMAND true
+# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
+# define CONF_CLOCK_XOSC_CLOCK_FAILURE_DETECT false
+# define CONF_CLOCK_XOSC_CLOCK_FAILURE_DIV SYSTEM_CFD_DIV_128
+# define CONF_CLOCK_XOSC_CLOCK_FAILURE_EVENT_OUT false
+
+/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
+# define CONF_CLOCK_XOSC32K_ENABLE false
+# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
+# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
+# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
+# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
+# define CONF_CLOCK_XOSC32K_ON_DEMAND true
+# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY false
+# define CONF_CLOCK_XOSC32K_CLOCK_FAILURE_DETECT false
+# define CONF_CLOCK_XOSC32K_CLOCK_FAILURE_DIV SYSTEM_CFD_DIV_1
+# define CONF_CLOCK_XOSC32K_CLOCK_FAILURE_EVENT_OUT false
+
+/* SYSTEM_CLOCK_SOURCE_OSCULP32K configuration - Internal Ultra Low Power 32KHz oscillator */
+# define CONF_CLOCK_OSCULP32K_ENABLE_1KHZ_OUTPUT true
+# define CONF_CLOCK_OSCULP32K_ENABLE_32KHZ_OUTPUT true
+
+/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
+# define CONF_CLOCK_DFLL_ENABLE false
+# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN
+# define CONF_CLOCK_DFLL_ON_DEMAND false
+# define CONF_CLOCK_DFLL_RUN_IN_STANDBY false
+
+/* DFLL open loop mode configuration */
+# define CONF_CLOCK_DFLL_FINE_VALUE (512)
+
+/* DFLL closed loop mode configuration */
+# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
+# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
+# define CONF_CLOCK_DFLL_QUICK_LOCK true
+# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
+# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
+# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
+# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 4)
+# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 4)
+
+/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
+# define CONF_CLOCK_DPLL_ENABLE false
+# define CONF_CLOCK_DPLL_ON_DEMAND true
+# define CONF_CLOCK_DPLL_RUN_IN_STANDBY false
+# define CONF_CLOCK_DPLL_LOCK_BYPASS false
+# define CONF_CLOCK_DPLL_WAKE_UP_FAST false
+# define CONF_CLOCK_DPLL_LOW_POWER_ENABLE false
+
+# define CONF_CLOCK_DPLL_LOCK_TIME SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
+# define CONF_CLOCK_DPLL_REFERENCE_CLOCK SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
+# define CONF_CLOCK_DPLL_FILTER SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
+# define CONF_CLOCK_DPLL_PRESCALER SYSTEM_CLOCK_SOURCE_DPLL_DIV_1
+
+# define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY 32768
+# define CONF_CLOCK_DPLL_REFERENCE_DIVIDER 1
+# define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY 48000000
+
+/* DPLL GCLK reference configuration */
+# define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
+/* DPLL GCLK lock timer configuration */
+# define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR GCLK_GENERATOR_1
+
+/* Set this to true to configure the GCLK when running clocks_init. If set to
+ * false, none of the GCLK generators will be configured in clocks_init(). */
+# define CONF_CLOCK_CONFIGURE_GCLK true
+
+/* Configure GCLK generator 0 (Main Clock) */
+# define CONF_CLOCK_GCLK_0_ENABLE true
+# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
+# define CONF_CLOCK_GCLK_0_PRESCALER 1
+# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 1 */
+# define CONF_CLOCK_GCLK_1_ENABLE false
+# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
+# define CONF_CLOCK_GCLK_1_PRESCALER 1
+# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 2 */
+# define CONF_CLOCK_GCLK_2_ENABLE false
+# define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_2_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
+# define CONF_CLOCK_GCLK_2_PRESCALER 1
+# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 3 */
+# define CONF_CLOCK_GCLK_3_ENABLE false
+# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
+# define CONF_CLOCK_GCLK_3_PRESCALER 1
+# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 4 */
+# define CONF_CLOCK_GCLK_4_ENABLE false
+# define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_4_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
+# define CONF_CLOCK_GCLK_4_PRESCALER 1
+# define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE false
+
+#endif /* CONF_CLOCKS_H_INCLUDED */
+