diff options
| author | Michalis Kapsalakis <kapsalis1989@gmail.com> | 2017-12-22 11:04:06 +0100 |
|---|---|---|
| committer | Michael Mann <mmann78@netscape.net> | 2017-12-22 21:58:29 +0000 |
| commit | e6a350552a5f8e38ddf11583fb97ab9c303f2b9a (patch) | |
| tree | 35742279dc2e2d604a1d3f523d422a20d2322c7b /plugins | |
| parent | 7099a833bedf89416149767bd02ac572406d00a6 (diff) | |
Fix unreached registers and typos
This commit fixes the following
-- changes the order of registers in ecat_esc_register array
because they cannot be reached by the dissect_esc_register function.
-- typos in registers' information
Change-Id: Ia73823412abba26377f57fa59ad637879b5b9da1
Reviewed-on: https://code.wireshark.org/review/24949
Petri-Dish: Alexis La Goutte <alexis.lagoutte@gmail.com>
Tested-by: Petri Dish Buildbot
Reviewed-by: Michael Mann <mmann78@netscape.net>
Diffstat (limited to 'plugins')
| -rw-r--r-- | plugins/ethercat/packet-ethercat-datagram.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/plugins/ethercat/packet-ethercat-datagram.c b/plugins/ethercat/packet-ethercat-datagram.c index cfbacddfd0..4e14c55f70 100644 --- a/plugins/ethercat/packet-ethercat-datagram.c +++ b/plugins/ethercat/packet-ethercat-datagram.c @@ -1104,18 +1104,18 @@ static ecat_esc_reg_info ecat_esc_registers [] = { 0x0007, 1, 1, &hf_ecat_reg_esc_dpram, NO_SUBTREE_FILL}, { 0x0008, 2, 1, &hf_ecat_reg_esc_features, ecat_esc_reg_8, &ett_ecat_reg_esc_features, NULL}, { 0x0010, 2, 1, &hf_ecat_reg_physaddr, NO_SUBTREE_FILL}, + { 0x0020, 2, 1, &hf_ecat_reg_regprotect, NO_SUBTREE_FILL}, + { 0x0030, 2, 1, &hf_ecat_reg_accessprotect, NO_SUBTREE_FILL}, + { 0x0040, 1, 1, &hf_ecat_reg_resetecat, NO_SUBTREE_FILL}, + { 0x0041, 1, 1, &hf_ecat_reg_resetpdi, NO_SUBTREE_FILL}, { 0x0012, 2, 1, &hf_ecat_reg_physaddr2, NO_SUBTREE_FILL}, { 0x0100, 1, 1, &hf_ecat_reg_dlctrl1, ecat_esc_reg_100, &ett_ecat_reg_dlctrl1, NULL}, { 0x0101, 1, 1, &hf_ecat_reg_dlctrl2, ecat_esc_reg_101, &ett_ecat_reg_dlctrl2, NULL}, { 0x0102, 1, 1, &hf_ecat_reg_dlctrl3, ecat_esc_reg_102, &ett_ecat_reg_dlctrl3, NULL}, { 0x0103, 1, 1, &hf_ecat_reg_dlctrl4, ecat_esc_reg_103, &ett_ecat_reg_dlctrl4, NULL}, + { 0x0108, 2, 1, &hf_ecat_reg_regphysrwoffs, NO_SUBTREE_FILL}, { 0x0110, 1, 1, &hf_ecat_reg_dlstatus1, ecat_esc_reg_110, &ett_ecat_reg_dlstatus1, NULL}, { 0x0111, 1, 1, &hf_ecat_reg_dlstatus2, ecat_esc_reg_111, &ett_ecat_reg_dlstatus2, NULL}, - { 0x0020, 2, 1, &hf_ecat_reg_regprotect, NO_SUBTREE_FILL}, - { 0x0030, 2, 1, &hf_ecat_reg_accessprotect, NO_SUBTREE_FILL}, - { 0x0040, 1, 1, &hf_ecat_reg_resetecat, NO_SUBTREE_FILL}, - { 0x0041, 1, 1, &hf_ecat_reg_resetpdi, NO_SUBTREE_FILL}, - { 0x0108, 2, 1, &hf_ecat_reg_regphysrwoffs, NO_SUBTREE_FILL}, { 0x0120, 2, 1, &hf_ecat_reg_alctrl, ecat_esc_reg_120, &ett_ecat_reg_alctrl, NULL}, { 0x0130, 2, 1, &hf_ecat_reg_alstatus, ecat_esc_reg_130, &ett_ecat_reg_alstatus, NULL}, { 0x0134, 2, 1, &hf_ecat_reg_alstatuscode, NO_SUBTREE_FILL}, @@ -2959,7 +2959,7 @@ void proto_register_ecat(void) FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } }, { &hf_ecat_reg_crc_fwd3, - {"Forw. CRC 3 (0x30C)", "ecat.reg.crc.fwd3", + {"Forw. CRC 3 (0x30B)", "ecat.reg.crc.fwd3", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } }, { &hf_ecat_reg_processuniterr, @@ -3619,7 +3619,7 @@ void proto_register_ecat(void) FT_BOOLEAN, 8, TFS(&tfs_local_true_false), 0x04, NULL, HFILL } }, { &hf_ecat_reg_dc_latch1_status, - {"DC Latch1 Status (0x9ae)", "ecat.reg.dc.latch1.status", + {"DC Latch1 Status (0x9af)", "ecat.reg.dc.latch1.status", FT_UINT8, BASE_HEX, NULL, 0, NULL, HFILL } }, { &hf_ecat_reg_dc_latch1_status_eventpos, |