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authorHarald Welte <laforge@osmocom.org>2020-03-01 15:44:43 +0100
committerHarald Welte <laforge@osmocom.org>2020-03-01 15:47:42 +0100
commit37220cce25b7113e128d9e2b0db70f9643a9876a (patch)
tree77281ea15fd54541d7564e5979c0c165153447a5
parent02712376dfbadd81bd89b639a60fbcd1d300e4b8 (diff)
Disable interrupts during EEFC_ReadUniqueID()
Reading the Unique ID from flash is a rather tricky procedure: After the STUI command has been issued, we cannot read normal flash anymore. Rather, the unique ID is mapped at 0x00000000. This is unfortuantely also where the exception vector table is stored. EEFC_ReadUniqueID() is already linked to RAM, which is good. Hoewver, if an Interrupt happens between STUI and SPUI, then we try to access the vector table and code from flash, which is illegal. We run into a hardfault and stay there until the watchdog resets the processor. Change-Id: I3c4fad55b47e9013f6615a331983b3989ca805a7 Closes: OS#4428
-rw-r--r--firmware/atmel_softpack_libraries/libchip_sam3s/source/unique_id.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/unique_id.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/unique_id.c
index 460eb9c..00c1aac 100644
--- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/unique_id.c
+++ b/firmware/atmel_softpack_libraries/libchip_sam3s/source/unique_id.c
@@ -8,6 +8,11 @@ void EEFC_ReadUniqueID(unsigned int *pdwUniqueID)
{
unsigned int status;
+ /* disable interrupts, as interrupt vectors are stored in flash,
+ * and after STUI was issued, we can no longer access flassh until
+ * SPUI complets */
+ __disable_irq();
+
/* Errata / Workaround: Set bit 16 of EEFC Flash Mode Register
* to 1 */
EFC->EEFC_FMR |= (1 << 16);
@@ -40,4 +45,6 @@ void EEFC_ReadUniqueID(unsigned int *pdwUniqueID)
do {
status = EFC->EEFC_FSR;
} while ((status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY);
+
+ __enable_irq();
}