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authorKévin Redon <kredon@sysmocom.de>2019-09-03 17:47:52 +0200
committerKévin Redon <kredon@sysmocom.de>2019-09-03 17:47:55 +0200
commit31f31e24eb2ad5c77bf26ea15ca45ea1940c9834 (patch)
tree502a41243f8ba8ac32f2171ae2b854e710f78cf0 /hardware/pcb
parent2ad8ff810043728162593bcb820c1dec26ec41dd (diff)
schematic: mark JP1 and JP2 as dot no place
the protruding through hole pins of the header for the jumper might get shorted when the board lies on a conductive surface, leading to unwanted flash erase (JP2) or false TST signal (JP1) Change-Id: I7fc6176d8c63ab8274b641e7bcd990093af3c4ca
Diffstat (limited to 'hardware/pcb')
-rw-r--r--hardware/pcb/schema/SIMtrace.pdfbin120980 -> 121120 bytes
1 files changed, 0 insertions, 0 deletions
diff --git a/hardware/pcb/schema/SIMtrace.pdf b/hardware/pcb/schema/SIMtrace.pdf
index a6532d7..7371671 100644
--- a/hardware/pcb/schema/SIMtrace.pdf
+++ b/hardware/pcb/schema/SIMtrace.pdf
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