diff options
| author | Kévin Redon <kredon@sysmocom.de> | 2019-09-03 17:52:24 +0200 |
|---|---|---|
| committer | Kévin Redon <kredon@sysmocom.de> | 2019-09-03 17:52:24 +0200 |
| commit | af693b2ee0869f81f7a8fef8c4143092ebaeeb4c (patch) | |
| tree | 5dc02496cc76b68ae24a66ffce56e104901e0470 | |
| parent | 31f31e24eb2ad5c77bf26ea15ca45ea1940c9834 (diff) | |
schematic: rename NP to DNP for clarity
Change-Id: I06c38e353f2b804faa0dcbf4a9405d5d5042af3e
| -rw-r--r-- | hardware/kicad/SIMtrace.sch | 18 | ||||
| -rw-r--r-- | hardware/pcb/schema/SIMtrace.pdf | bin | 121120 -> 121415 bytes |
2 files changed, 9 insertions, 9 deletions
diff --git a/hardware/kicad/SIMtrace.sch b/hardware/kicad/SIMtrace.sch index 2baadee..1ed2d15 100644 --- a/hardware/kicad/SIMtrace.sch +++ b/hardware/kicad/SIMtrace.sch @@ -265,7 +265,7 @@ F 0 "R22" V 2400 3750 50 0000 C CNN F 1 "100K" V 2300 3750 50 0000 C CNN F 2 "SM0603" H 2300 3750 60 0001 C CNN F 3 "" H 2300 3750 60 0001 C CNN -F 4 "NP" V 2200 3750 50 0000 C CNN "Place" +F 4 "DNP" V 2200 3750 50 0000 C CNN "Place" F 5 "no needed since we don't read FLAG" V 2300 3750 50 0001 C CNN "Note" 1 2300 3750 0 -1 -1 0 @@ -827,8 +827,8 @@ F 0 "JP2" H 4500 1000 50 0000 C CNN F 1 "ERASE" H 3800 1000 40 0000 C CNN F 2 "PIN_ARRAY_2X1" H 4150 950 60 0001 C CNN F 3 "" H 4150 950 60 0001 C CNN -F 4 "NP" H 4150 1000 50 0000 C CNN "Place" -F 5 "the pertruding through pins might get shorted when the board lies on a conductive surface, leading to unwanted flash erase" H 4150 950 50 0001 C CNN "Note" +F 4 "DNP" H 4150 1000 50 0000 C CNN "Place" +F 5 "the protruding through hole pins might get shorted when the board lies on a conductive surface, leading to unwanted flash erase" H 4150 950 50 0001 C CNN "Note" 1 4150 950 -1 0 0 -1 $EndComp @@ -840,8 +840,8 @@ F 0 "JP1" H 3800 1100 50 0000 C CNN F 1 "TEST" H 4500 1100 40 0000 C CNN F 2 "PIN_ARRAY_2X1" H 4150 1050 60 0001 C CNN F 3 "" H 4150 1050 60 0001 C CNN -F 4 "NP" H 4150 1100 50 0000 C CNN "Place" -F 5 "the pertruding through pins might get shorted when the board lies on a conductive surface, leading to false signal" H 4150 1050 50 0001 C CNN "Note" +F 4 "DNP" H 4150 1100 50 0000 C CNN "Place" +F 5 "the protruding through hole pins might get shorted when the board lies on a conductive surface, leading to false signal" H 4150 1050 50 0001 C CNN "Note" 1 4150 1050 1 0 0 -1 $EndComp @@ -1480,7 +1480,7 @@ F 0 "R24" H 3200 4800 40 0000 C CNN F 1 "100K" H 3200 4700 40 0000 C CNN F 2 "SM0603" V 2980 4700 30 0001 C CNN F 3 "" H 3050 4700 60 0001 C CNN -F 4 "NP" H 3200 4600 50 0000 C CNN "Place" +F 4 "DNP" H 3200 4600 50 0000 C CNN "Place" F 5 "not needed since we don't read VCC_SIM" H 3050 4700 50 0001 C CNN "Note" 1 3050 4700 1 0 0 -1 @@ -1493,7 +1493,7 @@ F 0 "R15" H 3200 3250 40 0000 C CNN F 1 "100K" H 3200 3150 40 0000 C CNN F 2 "SM0603" V 2980 3150 30 0001 C CNN F 3 "" H 3050 3150 60 0001 C CNN -F 4 "NP" H 3200 3050 50 0000 C CNN "Place" +F 4 "DNP" H 3200 3050 50 0000 C CNN "Place" F 5 "not needed since we don't read VCC_SIM" H 3050 3150 50 0001 C CNN "Note" 1 3050 3150 1 0 0 -1 @@ -2426,8 +2426,8 @@ F 3 "~" H 850 4450 60 0000 C CNN 1 850 4450 1 0 0 -1 $EndComp -Text Notes 9250 6700 0 59 ~ 0 -NP = do Not Place (because not required) +Text Notes 10100 6750 0 59 ~ 0 +DNP = Do Not Place\n(because not required) Wire Wire Line 2400 4300 3450 4300 $EndSCHEMATC diff --git a/hardware/pcb/schema/SIMtrace.pdf b/hardware/pcb/schema/SIMtrace.pdf Binary files differindex 7371671..f499167 100644 --- a/hardware/pcb/schema/SIMtrace.pdf +++ b/hardware/pcb/schema/SIMtrace.pdf |