summaryrefslogtreecommitdiffstats
path: root/src/target_dsp/calypso/dsp_sniff.S
blob: 225e2ebbda5a7d41b4697ede79abcae270abb179 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
; DSP Sniffing task patch

;
; (C) 2010 by Sylvain Munaut <tnt@246tNt.com>
; (C) 2011 by Steve Markgraf <steve@steve-m.de>
;
; All Rights Reserved
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License along
; with this program; if not, write to the Free Software Foundation, Inc.,
; 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
;

; ----------------------------------------------------------------------------
; Known symbols
; ----------------------------------------------------------------------------

	; Variables
patch_install_fptr	.equ	0x3F6B		; Patch install function ptr
dsp_page		.equ	0x3FB0		; Current ndb.d_dsp_page
task_fn_entry		.equ	0x4387 + 23	; Task 23 index in JT_4387

	; Functions
a5_setup		.equ	0xB12C
dma_queue_setup		.equ	0xB74C

jt4387_exec		.equ	0xA9EA

fq_4320_push		.equ	0xAA9F
fq_4330_push		.equ	0xAA6C
fq_4340_push		.equ	0xAAC3

; ----------------------------------------------------------------------------
; MCSI (Multi-Channel Serial Interface)
; ----------------------------------------------------------------------------

	; MCSI registers
MCSI_CONTROL_REG	.equ	0x800
MCSI_MAIN_PARAM_REG	.equ	0x801
MCSI_CLOCK_REG		.equ	0x805
MCSI_STATUS_REG		.equ	0x806
MCSI_TX0_REG		.equ	0x820

	; MCSI STATUS_REG bits
MCSI_TX_READY		.equ	0x10
MCSI_TX_UNFLOW		.equ	0x20

; ----------------------------------------------------------------------------
; Our double buffer API
; ----------------------------------------------------------------------------

			.section .apiram

sniff_db0		.ds	138
sniff_db1		.ds	138
sniff_db_ptr		.ds	1
sniff_burst_ptr		.ds	1

	; Variables for MCSI
mcsi_tmp			.ds	1
mcsi_cnt			.ds	1

; ----------------------------------------------------------------------------
; The code itself
; ----------------------------------------------------------------------------

			.text

;
; Patch init
;
;  Called during DSP boot (around the middle)
;
patch_init:
			st	#patch_install, *(patch_install_fptr)
			ret

;
; Patch install
;
;  Called after DSP init. That's were the overriding of all the
;  jump tables should be done.
;
patch_install:
			st	#sniff_task, *(task_fn_entry)
			ret

;
; New sniff task
;
;  Called by the dispatch code when the value 23 is found in d_task_d
;
sniff_task:
			; Setup our double buffer zone ptr
			stm	#sniff_db0, AR1
			bitf	*(dsp_page), #1
			bc	1f, ntc
			stm	#sniff_db1, AR1
1:

			mvmd	AR1, @sniff_db_ptr

			; Prepare the burst_ptr and burst_counter
				; sniff_db_ptr->r_nb = 0
			st	#0, *+AR1

				; sniff_burst_ptr = sniff_db_ptr + 2;
			mar	*AR1+
			mvmd	AR1, @sniff_burst_ptr

			; Queue A5 setup in FQ4340
			; (needed to make sure the a5 bits are zeroed)
			ld	#a5_setup, 0, A
			call	fq_4340_push

			; Prepare bursts reception
			; (we queue as many many as bursts to RX)
1:
				; Decrement & Check counter
			mvdm	@sniff_db_ptr, AR1
			nop				; (pipeline conflict)
			nop				; (pipeline conflict)

			ldu	*AR1, A
			bc	2f, aeq
			sub	#1, A
			stl	A, *AR1

				; Queue the DMA
			call	dma_queue_setup

				; Queue Burst handler in FQ4320
			ld	#burst_handler, 0, A
			call	fq_4320_push

				; Loop
			b	1b
2:

			; Done
			ret

;
; MCSI clear status
;
;  Clears the MCSI status register, needs AR1 to be set to point to a temp word
;
mcsi_clear_status:
			; The MCSI_TX_READY bit is cleared with a 1
			st	#MCSI_TX_READY, *AR1
			portw	*AR1, MCSI_STATUS_REG
			ret

;
; MCSI initialisation
;
;  Initializes and enables the MCSI
;
mcsi_init:
			stm	#mcsi_tmp, AR1

			; Use a clock divider of 2 -> 13MHz/2 = 6.5MHz
			st	#2, *AR1
			portw	*AR1, MCSI_CLOCK_REG

			; Set MCSI parameters: 16 bit framesize, master mode
			st	#0x4F, *AR1
			portw	*AR1, MCSI_MAIN_PARAM_REG

			; Enable MCSI clock
			st	#1, *AR1
			portw	*AR1, MCSI_CONTROL_REG

			call mcsi_clear_status

			; Done
			ret

;
; MCSI send word
;
;  Sends a word of 16 bits over the MCSI and increases the source address
;  Parameter: the address of the word has to be stored in AR4
;
mcsi_send_word:
			stm	#mcsi_tmp, AR1
			call	mcsi_clear_status

			; Write TX word and increase address
			portw	*AR4+, MCSI_TX0_REG

			; Loop until TX_READY bit of MCSI_STATUS_REG
			; has been set (happens around the 4th transmitted bit)
1:
			portr	MCSI_STATUS_REG, *AR1
			bitf	*AR1, #MCSI_TX_READY
			bc	1b, ntc

			; Done
			ret

;
; MCSI send burst
;
;  Sends a burst of *AR2 words, beginning at the address of AR4
;  Parameters: the number of words to send at *AR2, start-address in AR4
;
mcsi_send_burst:
			; Load word-count in A
			ldu	*AR2, A

			; Loop over all words
1:
			call	mcsi_send_word
			sub	#1, A
			bc	1b, aneq

			; Done
			ret

;
; MCSI disable
;
;  waits until the last word has been sent and disables the MCSI
;
mcsi_disable:
			stm	#mcsi_tmp, AR1

1:			; Loop until TX_UNFLOW bit of MCSI_STATUS_REG
			; has been set (can only be reset with SW_RESET)
			portr	MCSI_STATUS_REG, *AR1
			bitf	*AR1, #MCSI_TX_UNFLOW
			bc	1b, ntc

			; disable MCSI clock and set SW_RESET
			st	#2, *AR1
			portw	*AR1, MCSI_CONTROL_REG

			; Done
			ret

;
; Burst data handler
;
;  Called once the DMA transfer is done and the IQ bits are received.
;  Most maintenance tasks (like cleanup after DMA and inth stuff) are
;  done for us. Only real work goes here.
;
burst_handler:
			; Store address of I/Q data
			stm	#0x0CCE, AR4

			; Initialize MCSI
			call	mcsi_init

			; Send the I/Q data over MCSI
			stm	#mcsi_cnt, AR2
			stm	#380, *AR2		; 190 samples, 380 words
			call	mcsi_send_burst

			; Disable MCSI
			call	mcsi_disable

			; NB demodulation
			ld	#0x34, A
			call	jt4387_exec

			; Base burst storage address
			mvdm	@sniff_burst_ptr, AR3
			nop				; (pipeline conflict)
			nop				; (pipeline conflict)

			; Copy "metadata"
			mvkd	@0x3FA4, *AR3+		; D_TOA
			mvkd	@0x3FA5, *AR3+		; D_PM
			mvkd	@0x3FA7, *AR3+		; D_ANGLE
			mvkd	@0x3FA6, *AR3+		; D_SNR
			mvkd	@0x0CCE, *AR3+		; dummy burst indicator

			; Copy the softbits
			stm	#0x0CCF, AR2		; src
			stm	#28, AR1		; size-1  (29 words = 116 bits)
			rpt	*(AR1)
			mvdd	*AR2+, *AR3+

			; Backup the old burst begin address
			mvdm	@sniff_burst_ptr, AR4

			; Store the new pointer
			mvmd	AR3, @sniff_burst_ptr

			; Initialize MCSI
			call	mcsi_init

			; Send the demodulated burst data over MCSI
			stm	#mcsi_cnt, AR2
			stm	#34, *AR2		; 5 + 29 words
			call	mcsi_send_burst

			; Disable MCSI
			call	mcsi_disable

			; Increment received bursts count
			mvdm	@sniff_db_ptr, AR1
			nop				; (pipeline conflict)
			nop				; (pipeline conflict)
			addm	#1, *AR1(1)

			; Done
			ret