1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
|
.macro clear_bss
mov r0, #0
ldr r1, =__bss_start
ldr r2, =__bss_end
loop_bss:
cmp r1, r2
strlo r0, [r1], #4
blo loop_bss
.endm
.macro copy_data
ldr r0, =__data_start
ldr r1, =_data_start
ldr r2, =__data_end
cmp r0, r2
beq done_data
loop_data:
ldrb r4, [r0], #1
strb r4, [r1], #1
cmp r0, r2
bne loop_data
done_data:
.endm
.macro copy_ramtext
ldr r0, =__ramtext_start
ldr r1, =_ramtext_start
ldr r2, =__ramtext_end
cmp r0, r2
beq done_ramtext
loop_ramtext:
ldrb r4, [r0], #1
strb r4, [r1], #1
cmp r0, r2
bne loop_ramtext
done_ramtext:
.endm
.EQU ARM_MODE_FIQ, 0x11
.EQU ARM_MODE_IRQ, 0x12
.EQU ARM_MODE_SVC, 0x13
.EQU I_BIT, 0x80
.EQU F_BIT, 0x40
#define TOP_OF_RAM 0x4000a000
#define FIQ_STACK_SIZE 1024
#define IRQ_STACK_SIZE 1024
.macro init_stacks
/* initialize stacks, starting at TOP_OF_RAM */
ldr r0, =TOP_OF_RAM
/* initialize FIQ stack */
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
mov r13, r0
sub r0, r0, #FIQ_STACK_SIZE
/* initialize IRQ stack */
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
mov r13, r0
sub r0, r0, #IRQ_STACK_SIZE
/* initialize supervisor stack */
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
mov r13, r0
.endm
.macro call_ctors
/* call constructor functions */
ldr r0, =_ctor_start
ldr r1, =_ctor_end
bl do_global_ctors
.endm
|
